# Staff Memory Layout Engineer

**Company**: Synopsys
**Location**: Da Nang
**Work arrangement**: onsite
**Experience**: staff
**Job type**: employee
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/da-nang/staff-memory-layout-engineer-in-da-nang/44408/91391710096
**Canonical**: https://yubhub.co/jobs/job_ea6a34b3-c1d

## Description

We are seeking a Staff Memory Layout Engineer to join our team. As a Staff Memory Layout Engineer, you will be responsible for leading the physical layout design of advanced memory IP (SRAM, ROM, eDRAM, etc.) at cell, array, and peripheral levels.

## What you'll do

- Lead the physical layout design of advanced memory IP (SRAM, ROM, eDRAM, etc.) at cell, array, and peripheral levels

- Ensure compliance with foundry process design rules (DRC/LVS) and memory-specific constraints

## What you need

- Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related fields

- Minimum of 5 years of experience in layout design

## Skills

### Required
- layout design
- foundry process design rules
- memory-specific constraints

### Nice to have
- Custom Compiler
- IC Compiler
- Virtuoso