# SOC IP Methodology Engineer - Custom SOC

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/SOC-IP-Methodology-Engineer---Custom-SOC_JR2011584?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_dd8120b0-68f

## Description

NVIDIA is seeking a Senior SOC/IP Methodology Engineer to design and architect next-generation custom SoC/IP solutions. The ideal candidate will have a strong passion for delivering innovative products and be motivated to work on life-changing SoCs.

### Responsibilities

- Develop and optimize semi-custom RTL to GDS methodologies, collaborating with internal and external partners, IP vendors, and customers.

- Work hands-on with EDA technologies, traversing from synthesis to final design closure, including timing and layout.

- Drive technical design reviews, identify and mitigate risks, and improve development processes with innovative tools and procedures.

- Collaborate with customers on SOC/IP development processes, IP quality, and handoff requirements.

- Analyze and solve critical issues, driving early PPA on customer IP and what-if experiments to meet KPI targets.

- Work with internal and external collaborators to carry out floorplan experiments and evaluate solution tradeoffs.

- Integrate external customer IP with NVIDIA's design methodology team.

### Requirements

- Master's degree with 8+ years or Bachelor's degree with 10+ years of experience in relevant skill areas.

- Extensive leadership experience as a methodology and technical expert in physical design.

- Experience working in a SOC development and customer-focused environment with excellent interpersonal skills.

- Hands-on experience with RTL-to-GDSII tool flows, physical design, and analysis tools from EDA vendors like Cadence, Synopsys, and Mentor.

- Strong background and knowledge in synthesis, CTS, power optimization, placement, and route methods, and timing convergence for high-performance designs.

- Strong scripting skills in Python, Perl, and Tcl, with excellent soft skills.

### Benefits

- Highly competitive salaries

- Comprehensive benefits package

- Equity eligibility

## Skills

### Required
- RTL-to-GDSII tool flows
- Physical design
- EDA technologies
- Synthesis
- CTS
- Power optimization
- Placement and route
- Timing convergence
- Python
- Perl
- Tcl

### Nice to have
- RTL2GDS experience with high-performance ARM cores
- Serdes
- DDR
- GPU
- Machine learning

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/SOC-IP-Methodology-Engineer---Custom-SOC_JR2011584?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)