# R&D Engineering, Manager

**Company**: Synopsys
**Location**: Noida, Uttar Pradesh
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/noida/r-and-d-engineering-manager/44408/102756615264?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_dcc718d9-988

## Description

Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.

As a R&D Engineering Manager at Synopsys, you will lead a team building memory IP that powers the most advanced chips in the world.

### Responsibilities

- Lead a team of engineers developing SRAM, Register File, TCAM, and ROM architectures and circuit implementations across advanced FinFET nodes

- Oversee the full memory design flow from architecture definition through schematic entry, simulation, layout planning, verification, characterization, and model generation

- Drive low-power and area-efficient circuit design strategies, balancing performance, variation, and manufacturability constraints

- Coordinate with CAD teams on layout verification, parasitic extraction, and compiler automation using Perl and Python

- Manage project timelines, prioritize deliverables, and resolve technical and resourcing issues across multi-site teams

- Build and maintain relationships with internal stakeholders and external customers, translating technical requirements into executable design plans

- Mentor engineers on memory compiler development, transistor-level design, and advanced node challenges

### The Impact You Will Have

- Deliver embedded memory IP that powers cutting-edge semiconductor products for Synopsys customers across AI, automotive, and high-performance computing

- Accelerate time-to-market for memory compilers by improving design flows, automation scripts, and characterization methodologies

- Enable your team to solve complex variation and power challenges in deep submicron and FinFET technologies, raising the technical bar across the organization

- Strengthen cross-functional collaboration between design, CAD, and verification teams, reducing integration friction and rework

- Build a high-performing, motivated team that consistently delivers on schedule and grows technically under your leadership

- Shape the roadmap for next-generation memory IP, influencing architecture decisions that affect product competitiveness

- Contribute to Synopsys' reputation as a trusted partner by delivering robust, scalable, and customer-focused memory solutions

### Requirements

- BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from a recognized institute or university

- 15+ years of hands-on experience in embedded memory design, including SRAM, Register File, TCAM, or ROM

- Deep expertise across the full memory design flow: architecture, circuit design, layout, compiler automation, characterization, timing, and model generation

- Proven experience leading engineering teams and delivering complex projects on schedule in a multi-site environment

- Strong proficiency in Perl and Python for design automation and scripting

- Hands-on experience with deep submicron and FinFET technologies, including variation-aware design techniques

- Solid understanding of CMOS fundamentals, digital design, RC circuits, transfer function analysis, and CMOS fabrication processes

## Skills

### Required
- Electrical & Electronics Engineering
- Embedded Memory Design
- SRAM
- Register File
- TCAM
- ROM
- Perl
- Python
- CMOS Fundamentals
- Digital Design
- FinFET Technologies

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/noida/r-and-d-engineering-manager/44408/102756615264?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)