# Post-Silicon Validation and Methodology Engineer

**Company**: NVIDIA
**Location**: Santa Clara
**Work arrangement**: hybrid
**Experience**: senior
**Job type**: full-time
**Salary**: $100,000–$150,000
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Post-Silicon-Validation-and-Methodology-Engineer_JR2018268?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_d740027f-8d8

## Description

Join NVIDIA's Silicon Co-Design Group, where you will own bring-up, validation, qualification, tuning, and productization plans for next-generation silicon. You will partner across architecture, build, firmware, and software teams to define requirements for power management and clocking features, then drive coverage from pre-silicon through production. You will build and deploy AI-assisted lab workflows, automate bring-up telemetry and silicon measurement data evaluation, and provide anomaly detection on regression results and debug-triage tooling. You will also lead root-cause analysis on the hardest HW/SW interaction issues and identify where current processes break and redesign them.

To succeed in this role, you will need a BS or MS in Electrical or Computer Engineering (or equivalent experience) and 5+ years in silicon bring-up, validation, debug, or productization. You will require deep fundamentals across digital development, microarchitecture, timing, clocking, power, noise, and control systems, as well as hands-on lab proficiency with oscilloscopes, logic analyzers, power analyzers, and strong programming and scripting proficiency in Python, C/C++. You will also need proficiency in the use of AI tools to accelerate silicon validation work, such as automated analysis of bring-up logs, regression data, or lab instrumentation output, anomaly detection on silicon measurement datasets, or LLM-assisted debug triage.

In this role, you will have the opportunity to craft debug infrastructure, characterize methodologies, and develop DFT feature specs or in-system test suites. You will also have the chance to redesign how a team debugs in the lab, faster triage, smarter hypothesis trees, automated measurement reporting, and the resulting increase in bring-up velocity or quality.

## Skills

### Required
- Python
- C/C++
- Oscilloscope
- Logic Analyzer
- Power Analyzer
- AI Tools
- Silicon Validation
- Digital Development
- Microarchitecture
- Timing
- Clocking
- Power
- Noise
- Control Systems

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Post-Silicon-Validation-and-Methodology-Engineer_JR2018268?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)