# Hardware Validation Engineer, Sr Staff **Company**: Synopsys **Location**: Nepean, Ontario **Work arrangement**: onsite **Experience**: senior **Job type**: full-time **Salary**: $120000-$180000 **Category**: Engineering **Industry**: Technology **Ticker**: SNPS **Wikidata**: https://www.wikidata.org/wiki/Q2303478 **Apply**: https://careers.synopsys.com/job/nepean/hardware-validation-engineer-sr-staff/44408/101403651232?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply **Canonical**: https://yubhub.co/jobs/job_cff087c6-adf ## Description Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. You have spent years turning design files into real boards that work, not just pass DRC, actually work when you power them up and start probing signals. You know that a clean schematic means nothing if the layout introduces crosstalk that kills your eye diagram. At Synopsys, you will validate memory interface IP where the margin between working silicon and a customer escalation is measured in picoseconds, and your board-level work is what closes that gap. ### Responsibilities - Design, layout, and validate PCBs in Cadence Allegro for memory interface IP characterization and customer reference designs - Analyze high-speed signal behavior using S-parameters, eye diagrams, and crosstalk simulations to ensure signal integrity across multi-gigabit interfaces - Route and validate communication interfaces including JTAG, I2C, and other low-speed control planes with attention to noise immunity and timing margins - Debug board-level issues using logic analyzers, oscilloscopes, and protocol analyzers to isolate failures across silicon, firmware, layout, and test setup - Review design files and layout with cross-functional teams, teaching best practices for routing, decoupling, and design rule adherence - Interpret simulation waveforms from SPICE, IBIS, and channel analysis tools to validate analog and mixed-signal circuit performance - Drive root cause analysis on validation failures, determining whether issues stem from silicon behavior, board design, or environmental factors ### The Impact You Will Have - Your board designs will serve as the validation platform for Synopsys memory IP used in customer production deployments across automotive, mobile, and data center applications - The signal integrity work you do will directly inform design guidelines that prevent customer respins and reduce time to market - Your debug findings will feed back into silicon design teams, closing the loop between simulated and measured performance - The review practices you establish will raise the quality bar for how the team evaluates layout and catches issues before boards are fabricated - Your ability to isolate failures quickly will accelerate bring-up schedules and get IP into customer hands faster - The reference designs you validate will become the foundation for how customers integrate Synopsys IP into their own systems - Your mentorship will build the next generation of validation engineers who understand the full stack from transistor to trace ### Requirements - Bachelor's or Master's in Electrical Engineering, Electronics Engineering, or equivalent hands-on experience - 6-8+ years of Hardware design and validation experience with a focus on high-speed digital and mixed-signal systems - Expert-level proficiency in Cadence Allegro for schematic capture, PCB layout, and constraint-driven design - Deep understanding of signal integrity concepts including S-parameters, impedance control, crosstalk, intersymbol interference, and return loss - Strong knowledge of analog IC circuit design and the ability to analyze SPICE simulation waveforms and correlate them to measured behavior - Hands-on experience debugging hardware using logic analyzers, oscilloscopes, VNAs, spectrum analyzers, protocol analyzers, and other bench instrumentation - Experience with communication interfaces such as JTAG, I2C, SPI, and UART, including routing best practices and protocol-level debug - Knowledge of PCB stack-up design and high-speed materials. ### Benefits - Comprehensive medical and healthcare plans that work for you and your family - In addition to company holidays, we have ETO and FTO Programs - Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more - Purchase Synopsys common stock at a 15% discount, with a 24-month look-back - Save for your future with our retirement plans that vary by region and country - Competitive salaries ## Skills ### Required - Cadence Allegro - signal integrity - PCB design - high-speed digital systems - mixed-signal systems - SPICE - IBIS - channel analysis - JTAG - I2C - SPI - UART --- Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/nepean/hardware-validation-engineer-sr-staff/44408/101403651232?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)