# Senior Package Layout Engineer - Hardware

**Company**: NVIDIA
**Location**: Bengaluru
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/India-Bengaluru/Senior-Package-Layout-Engineer---Hardware_JR2019967-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_cfc18b4b-cdc

## Description

NVIDIA is seeking a Senior Package Layout Engineer to collaborate with Technical Package Lead and design teams on the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products.

The successful candidate will work on implementing high-speed/density ASIC packages, performing substrate breakout patterns, optimizing package pinout, and conducting design feasibility studies.

Key responsibilities include:

- Collaborating with the Layout team to implement high-speed/density ASIC packages

- Performing substrate breakout patterns for ASIC packages

- Optimizing package pinout incorporating system-level trade-offs of pin assignments

- Conducting package routing, placement, stack-up, reference plane, and power distribution using Cadence APD or SiP tool suite

- Proposing layout design trade-offs to the Technical Package Lead for resolution and implementation

- Conducting design feasibility studies to evaluate Package design goals for size, cost, and system performance

- Developing symbols and CAD library databases using Cadence APD design tools

- Developing methodologies to improve layout productivity

Requirements:

- B.S. Electrical Engineering or equivalent experience

- 5+ years of experience in PCB Layout of graphics cards, motherboards, line cards, or other related technology

- Proven experience in substrate layout of wire bond and flip chip packages is preferred

- Significant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager)

- Solid understanding of high-speed design signal integrity practices

- Experience with Virtuoso and Calibre is a plus

- Experience using Valor is helpful

## Skills

### Required
- Electrical Engineering
- PCB Layout
- Cadence APD
- SiP
- High-speed design
- Signal integrity

### Nice to have
- Virtuoso
- Calibre
- Valor
- HDI designs

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/India-Bengaluru/Senior-Package-Layout-Engineer---Hardware_JR2019967-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)