# Package Design Methodology Engineer

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Work arrangement**: remote
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Package-Design-Methodology-Engineer_JR2021653?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_ce0a2605-b20

## Description

NVIDIA's Advanced Package Engineering team is seeking a Package Design Methodology Engineer to work on cutting-edge chip design and physical reality of getting silicon to product. You will craft production-grade EDA tooling for multi-die packages, connecting dozens of chiplets across substrates, interposers, and heterogeneous interfaces.

**Job Description:** As a Package Design Methodology Engineer, you will:

- Design and implement VLSI tools for silicon and substrate design.

- Develop applications to enable project engineers with an emphasis on maintainability and ease of use.

- Develop flows/tools and methodologies to construct, analyze, and validate package designs at various stages in the production flow.

- Optimize daily workflows of top package designers.

**Requirements:**

- BS in Computer Science, Electrical Engineering, or a related field (or equivalent experience).

- 5+ years of flow and methodology development experience building flows for package design used by engineering teams at scale.

- Good programming fundamentals in Python and/or C++.

- Demonstrated experience applying AI/ML techniques in engineering workflows.

- Strong understanding of electrical engineering fundamentals relevant to VLSI package design.

**Benefits:** NVIDIA offers highly competitive salaries and a comprehensive benefits package, including equity and benefits. Visit www.nvidiabenefits.com/ for more information.

## Skills

### Required
- Python
- C++
- VLSI design
- Electrical Engineering
- AI/ML techniques

### Nice to have
- VLSI package design
- interposer and IC physical design
- package design flows and methodologies

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Package-Design-Methodology-Engineer_JR2021653?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)