# PCIe IP Verification Engineer

**Company**: NVIDIA
**Location**: Bengaluru, India
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/India-Bengaluru/PCIe-IP-Verification-Engineer_JR2019919-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_cb734b13-506

## Description

NVIDIA is seeking a Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world's leading GPUs and SOCs.

The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA's GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world.

**Responsibilities:**

- Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.

- Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.

- Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.

- Collaborate with architects, designers, and pre and post silicon verification teams to accomplish tasks.

**Requirements:**

- B.Tech./ M.Tech or equivalent experience

- 2+ years of relevant experience

- Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog

- Expertise in comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)

- Experience in developing and working in functional coverage based constrained random verification environments

- Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug

**Preferred Qualifications:**

- Excellent knowledge of PCIE protocol - Gen3 and above

- Good understanding of the system level architecture of PCIE/CXL-based designs

- Perl, Python or similar scripting and SW programming language experience

- Good debugging and analytical skills

- Good interpersonal skills & dream to work as a great teammate

## Skills

### Required
- ASIC design
- Verification methodologies
- UVM
- SystemVerilog
- Verilog
- PCI Express
- IP verification

### Nice to have
- PCIE protocol
- Python
- Perl
- Debugging
- Analytical skills

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/India-Bengaluru/PCIe-IP-Verification-Engineer_JR2019919-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)