# Distinguished Engineer, End-to-End Scaling Performance Architecture

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Distinguished-Engineer--End-to-End-Scaling-Performance-Architecture_JR2021847?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_c4efa611-d9d

## Description

We are looking for a Distinguished Engineer to join NVIDIA's architecture organization and help define how future accelerated computing systems scale from a single processor to multi-die, multi-GPU, and multi-node platforms.

In this role, you will set long-term performance strategy across applications, systems, and architecture, including DRAM, NVLink, and chip-to-chip (C2C) interconnects.

**Responsibilities:**

- Define the multi-generation strategy for application scaling across DRAM, NVLink, C2C, compute, and the supporting software stack.

- Translate the behavior of important AI, HPC, and accelerated computing applications into architectural requirements, performance targets, and investment priorities.

- Build a clear view of how bottlenecks shift as workloads scale across dies, GPUs, nodes, model sizes, data sets, and communication patterns.

- Evaluate system-level trade-offs across bandwidth, latency, capacity, topology, coherence, power, area, cost, programmability, and resiliency.

- Establish common workload scenarios, scaling metrics, models, and decision frameworks so architecture teams can compare proposals against application outcomes.

- Identify architectural discontinuities and emerging technology opportunities early enough to shape product and technology decisions.

- Provide clear recommendations to senior technical and business leaders, including assumptions, sensitivities, risks, and expected impact.

- Mentor system performance architects, strengthen technical communities across teams, generate sustained intellectual property, and help influence the direction of large-scale accelerated computing.

**Requirements:**

- MSEE, MSCE, PhD, or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

- 18+ years of relevant industry or academic experience, including experience setting architecture direction for complex, high-performance systems.

- Deep understanding of system performance and scaling, including interactions among DRAM behavior, high-bandwidth fabrics such as NVLink, and C2C communication.

- Strong application-level intuition, including the ability to connect workload algorithms, parallelism, communication, locality, and data movement to architecture choices and measurable outcomes.

- Record of identifying cross-domain opportunities that may not be visible when teams optimize individual components separately.

- Demonstrated ability to create and advance a multi-generation technical strategy through influence across silicon, systems, software, and application teams.

- Clear communication and sound judgment in ambiguous technical areas, with the ability to explain complex system trade-offs to specialists and executive leaders.

**Benefits:**

- Equity

- Benefits

## Skills

### Required
- Electrical Engineering
- Computer Engineering
- Computer Science
- System Performance
- Scaling
- DRAM
- NVLink
- C2C communication

### Nice to have
- Workload characterization
- Analytical or simulation-based performance modeling
- Bottleneck analysis
- Architecture trade-off evaluation

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Distinguished-Engineer--End-to-End-Scaling-Performance-Architecture_JR2021847?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)