# High-Speed Analog/Mixed-Signal Design Engineer

**Company**: Cisco
**Location**: Carlsbad, California
**Experience**: senior
**Job type**: full-time
**Salary**: $192,400.00 to $275,800.00
**Category**: Engineering
**Industry**: Technology

**Apply**: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Carlsbad-California-US/ASIC-High-Speed-AMS-Technical-Leader_2012219?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_c4964373-a9b

## Description

The Silicon One team at Cisco creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organisations globally.

As our High-Speed Analog/Mixed-Signal Design Engineer, you will directly lead the electrical specifications, custom circuit design, and verification strategies for Cisco’s next-generation 800G, 1.6T, and beyond silicon photonics modules.

Operating within our best-in-class Silicon Photonics team, you will own the end-to-end development cycle for 100G/200G/400G per Lambda driver integrated circuits that seamlessly integrate with Cisco's core routing, switching, and datacenter platforms.

Your technical leadership will span critical execution phases from concept to production:

- Datapath & Control Ownership: Author high-performance mixed-signal datapath and low-speed control circuits for both receive and transmit paths,including photonic modulator drivers, serializers, PLLs, and TIAs,while rigorously optimising for power, performance, testability, and cost.

- Full-Chip Architecture & Integration: Drive full-chip electrical specifications and comprehensive verification test plans, coordinating tightly across electrical, optical, and product architecture teams.

- Bring-Up & Yield Enhancement: Debug complex silicon and system-level bottlenecks hands-on during lab validation and bring-up phases to drive yield enhancements and failure analysis.

- Technical Leadership & Mentoring: Guide and mentor analog, digital, and validation engineers, elevating our team’s engineering excellence across next-gen data center architectures.

**Minimum Qualifications**

- Bachelors + 12 years of related experience, or Masters + 8 years of related experience, or PhD + 5 years of high-speed AMS design experience

- Demonstrated expertise in high-speed optical transceiver design (modulator drivers, TIA, CDR, PLLs, ADC/DAC) and proficiency with industry standard tools (Cadence Virtuoso, Spectre, Caliber, SystemVerilog, Verilog-AMS)

- Demonstrated ability to lead design teams through full tapeout cycle, making critical decisions with limited data and delivering successful silicon products

- Proficiency in Python or C for design automation, scripting, and analytical tools

**Preferred Qualifications**

- 10-15 years of analog/mixed signal circuit design experience

- Experience with silicon photonics driver ICs and direct-detect optical module architectures

- Strong understanding of silicon photonics, optical subsystems, MSA standards (QSFP/QSFP-DD), and IEEE 802.3 specifications

- Expertise in multiple high-speed PHYs, protocols and subsystems (SerDes 112Gbps/224Gbps PAM4, Ethernet, UCIE, clock and data recovery systems, PLLs, ADC/DAC circuits)

- Demonstrated experience in design for testability (DFT) and test methodology development for large mixed-signal designs

- Proven experience with lab instrumentation (digital communication analyzers, real-time scopes, BERTs), SI/PI and test fixture/PCB

- Familiarity with optical sub-component models (photodiodes, modulators) and Verilog-A modeling for AMS simulations

- Strong collaborator and teammate with the ability to work across teams in multiple sites

The starting salary range posted for this position is $192,400.00 to $275,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance.

## Skills

### Required
- high-speed optical transceiver design
- Cadence Virtuoso
- Spectre
- Caliber
- SystemVerilog
- Verilog-AMS
- Python
- C

### Nice to have
- analog/mixed signal circuit design
- silicon photonics driver ICs
- direct-detect optical module architectures
- QSFP/QSFP-DD
- IEEE 802.3 specifications
- SerDes 112Gbps/224Gbps PAM4
- Ethernet
- UCIE
- clock and data recovery systems
- PLLs
- ADC/DAC circuits
- design for testability (DFT)
- test methodology development
- lab instrumentation
- SI/PI
- test fixture/PCB
- Verilog-A modeling

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