# R(reverse)&D Engineering, Sr Staff Engineer

**Company**: Synopsys
**Location**: Hillsboro
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: $144,000-$216,000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/hillsboro/r-and-d-engineering-sr-staff-engineer-16844/44408/93930643680
**Canonical**: https://yubhub.co/jobs/job_bc8302bd-681

## Description

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

As a seasoned engineering professional with a passion for advancing electronic design automation (EDA) and CAD automation, you will thrive on solving complex technical challenges and enjoy collaborating with diverse teams to deliver robust, scalable solutions. Your expertise is rooted in front-end synthesis, timing constraints, and digital design flows, and you have a keen eye for detail and quality.

You will design, develop, and enhance logic synthesis features and automation flows for industry-leading EDA solutions. You will own and maintain synthesis capabilities to optimize timing, area, power, and Quality of Results (QoR). You will develop and debug solutions across end-to-end EDA flows, understanding interactions between synthesis, place & route, STA, and power analysis tools.

You will analyze and resolve complex customer and internal issues related to timing constraints (SDC), synthesis behavior, and flow integration. You will collaborate with architecture, verification, QA, and product management teams to deliver integrated, production-quality EDA solutions. You will participate actively in technical design discussions, code reviews, and roadmap planning to shape future product directions.

You will ensure high engineering quality through unit testing, regression support, and adherence to best development practices. You will contribute to internal documentation, knowledge sharing, and mentoring junior engineers to foster team growth.

The impact you will have includes enabling customers to achieve optimal timing, area, and power results in their ASIC and SoC designs. You will drive innovation in EDA automation, shaping the future of semiconductor design flows. You will improve product reliability, scalability, and integration across Synopsys' IP packaging and subsystem assembly solutions.

To be successful in this role, you will need a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. You will require 6–8 years of experience in EDA tools, CAD automation, or system-level software development. You will need strong proficiency in C/C++ for large-scale software development.

You will demonstrate a strong sense of ownership, accountability, and technical leadership. You will have clear and effective written and verbal communication skills to engage with technical and non-technical audiences. You will be able to work independently on complex problems while collaborating across teams.

You will join a highly collaborative R&D team at Synopsys dedicated to advancing EDA tool development and automation. The team focuses on integrated design flows for IP packaging and subsystem assembly. You will work alongside talented engineers, architects, and product managers, contributing to innovative solutions that set industry standards and drive customer success.

## Skills

### Required
- C/C++
- EDA tools
- CAD automation
- system-level software development
- front-end synthesis
- timing constraints
- digital design flows