# HSIO Validation Lead

**Company**: NVIDIA
**Location**: Santa Clara
**Work arrangement**: hybrid
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/HSIO-Validation-Engineer_JR2013495-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_bb4e387d-d8d

## Description

We are actively seeking the smartest minds to join our company and usher in the next wave of computing. As an HSIO Validation Lead, you will drive the planning and execution of PCIe/NVLINK/C2C or similar HSIO interfaces across functional bring-up, system-level validation, productization, and troubleshooting for NVIDIA GPUs, CPUs, and SOCs.

Your responsibilities will include: Drive schedule, programming guides, customer critical issues, manufacturing yield improvements, and design feedback. Investigate technically complicated HSIO bugs and help drive debug efforts across various teams Coordinate with logic design, circuit design, board design, Simulation, diagnostics, ATE, firmware, driver, and marketing teams to drive the chip into production. Develop new methodologies to improve the silicon validation process, helping meet upcoming industry standards for performance, adaptability, and safety. Ensure interoperability with connected devices and system components in sophisticated interconnect topologies. Engage proactively with multi-functional engineering teams, including system architects, mixed-signal design, DGX, software/firmware, hardware/software quality assurance, operations, and application engineering, to facilitate the design, development, troubleshooting, and release of upcoming products.

To succeed in this role, you will need: BS or MS in Electrical or Computer Engineering (or equivalent experience) and a minimum of 8 years of relevant experience In-depth understanding of PCIe (or similar) protocol and characterization/validation methods in a post-silicon environment Excellent knowledge of Signal integrity concepts, Silicon characteristics, and high-speed/SERDES functional validation Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers) and hands-on post-Si bring-up, functional validation of HSIO interfaces Understanding of firmware/driver structures and their interaction with HW. Strong in scripting languages (Perl, Python) to write direct test/debug programs for stress and failure analysis Strong project management, collaboration, and communication skills

## Skills

### Required
- PCIe
- NVLINK
- C2C
- Signal integrity
- Silicon characteristics
- High-speed/SERDES functional validation
- Lab equipment
- Firmware/driver structures
- Scripting languages
- Project management
- Collaboration
- Communication

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/HSIO-Validation-Engineer_JR2013495-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)