As a Power Architecture Engineer at NVIDIA, you will be part of the Power Architecture Group, focusing on end-to-end power aspects such as ASIC power analysis, power architecture, low power design, power-aware verification, and power feature bring-up on silicon. Your responsibilities will include: Contributing to power analysis by architecting, developing, verifying, and correlating power estimation models/tools for NVIDIA's products Designing system-level power features to optimize dynamic and leakage power dissipation for various use cases Working on power verification, including structural, functional, and power-aware verification of power features Validating the effectiveness of power features on silicon and conducting studies to improve Performance/Watt Helping build power management solutions and driving innovation in energy efficiency across NVIDIA's product portfolio To be successful in this role, you will need: A B.Tech./M.Tech degree with 1+ years of experience in power-related areas such as power analysis, power design, power-aware verification, UPF methodologies, and power correlation Strong fundamentals in power, including transistor-level leakage/dynamic characteristics of VLSI circuits Strong fundamentals in digital design and Verilog Familiarity with low power design techniques such as multi-VT, clock gating, power gating, voltage islands, and dynamic voltage-frequency scaling (DVFS) Good background in power estimation techniques, flows, and algorithms Knowledge of power intent formats like UPF/CPF Experience with static power check tools like VCLP/CLP and dynamic power verification tools like VCS-NLP Preferred qualifications include good debugging and problem-solving skills, strong communication skills, and programming skills in Python.