# Analog Design, Staff Engineer

**Company**: Synopsys
**Location**: Bengaluru, Karnataka
**Experience**: staff
**Job type**: employee
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/bengaluru/analog-design-staff-engineer/44408/100672041328?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_a78d94ec-141

## Description

## Overview

You will be part of Synopsys, a leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products.

## Job Description

You have spent years in the trenches of high-speed interface design, where a 50-ohm trace matters and a poorly modeled via can sink a product launch. You know that signal integrity is not just about making the eye diagram look clean, it is about understanding what breaks at 56 Gbps and why the power delivery network you signed off on three months ago is now causing headaches in the lab.

You will work on the interfaces that power the next generation of AI and compute, and the work you do will show up in customer tape-outs across the industry.

### Responsibilities

- Review and analyze die, package, and PCB physical layouts for signal integrity and power integrity performance on high-speed interfaces

- Model, simulate, and verify DDR, HBM, UCIe, PCIe, and Ethernet interfaces using SPICE and 3D field solvers to ensure compliance with specifications

- Drive improvements to SI/PI methodology flows, identifying bottlenecks and building automation to increase accuracy and turnaround time

- Collaborate with IP development, customer engagement, and CAD teams on cross-functional projects tied to next-generation interface rollouts

- Independently lead SI/PI research and development activities for emerging standards including MRDIMM, LPDDR6, HBM4, and UCIe

- Debug and resolve signal integrity and power integrity issues in customer SoC, package, and board designs across different application domains

- Script and automate simulation workflows using Python and TCL to streamline repetitive tasks and improve team productivity

### The Impact You Will Have

- Enable SI/PI sign-off for customer designs across automotive, data center, mobile, and AI applications, directly affecting tape-out schedules and product success

- Improve the speed and accuracy of SI/PI methodology flows used by teams globally, reducing simulation turnaround time and increasing confidence in results

- Provide technical guidance to customers on next-generation memory and interconnect IP, helping them navigate design tradeoffs before they commit to silicon

- Drive early research into emerging standards so Synopsys can deliver IP and tools ahead of industry adoption curves

- Build cross-team collaboration between Bengaluru, North America, and APAC engineering groups, ensuring knowledge transfer and consistent methodology

- Contribute to Synopsys' leadership in high-speed interface IP by solving hard problems that competitors have not figured out yet

- Support the development of AI-driven SoCs by ensuring the memory and interconnect layers can actually deliver the bandwidth the architecture promises

### Requirements

- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field

- 5+ years of hands-on experience in signal integrity, power integrity, or high-speed interface design

- Strong working knowledge of transmission line theory, time-domain and frequency-domain analysis, and S-parameter modeling

- Proficiency with SPICE simulation tools and experience using 3D electromagnetic field solvers for layout extraction and analysis

- Practical understanding of DDR, HBM, UCIe, PCIe, or Ethernet interface architectures and their SI/PI challenges

- Solid verbal and written communication skills in English, you will work with global teams and customer-facing engineers regularly

- Experience with Python and TCL scripting for simulation automation and data post-processing is a strong plus

## Benefits

- Comprehensive medical and healthcare plans that work for you and your family

- In addition to company holidays, we have ETO and FTO Programs

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more

- Purchase Synopsys common stock at a 15% discount, with a 24-month look-back

- Save for your future with our retirement plans that vary by region and country

- Competitive salaries

## Skills

### Required
- signal integrity
- power integrity
- high-speed interface design
- SPICE simulation
- Python
- TCL

### Nice to have
- 3D electromagnetic field solvers
- DDR
- HBM
- UCIe
- PCIe
- Ethernet

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/bengaluru/analog-design-staff-engineer/44408/100672041328?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)