# Hardware Design Technical Lead

**Company**: Cisco
**Experience**: senior
**Job type**: full-time
**Salary**: $171,600.00 to $245,000.00
**Category**: Engineering
**Industry**: Technology

**Apply**: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/Hardware-Design-Engineer-Technical-Lead_2014522-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_a5326fbd-ed8

## Description

The Common Hardware Group (CHG) at Cisco is looking for a Hardware Design Technical Lead to join their team.

As a Hardware Design Technical Lead, you will be a key member of the Cisco Purpose Built Switch hardware team, responsible for defining and designing the next generation Hyperscaler Switch hardware based on Silicon One and/or merchant ASIC.

Key responsibilities include:

- System and board level specification, schematic capture, FPGA design, ASIC/System level bring up and troubleshooting

- Bringing up the system to work with multiple groups including ASIC, DFT, Signal Integrity, software, Diagnostics and Manufacturing team to resolve any design issues

- Debugging and troubleshooting in labs using scopes and analyzers

- Acting as technical liaison with major component Suppliers for the product

To be successful in this role, you will need:

- Bachelor's degree in Electrical Engineering or Computer Engineering or Telecommunications and 8+ years of experience, or Master’s degree in Electrical Engineering or Computer Engineering or Telecommunications and 6+ years of experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in system level development

- Prior experience with common HW technology, including power, clock, memory, CPU, and variety of system interfaces

- Previous experience with complex high-speed board design and board bring-up

- Prior experience with schematics/layout, Hardware bring-up, trouble-shooting, system level testing

- Experience with working with Software team on system bring-up and porting, devices configuration (registers level)

Preferred qualifications include:

- Experience with schematics, PCB and Verilog HDL/VHDL design

- Experience on the scripts (Python, Tcl, etc.)

- Experience with lab bring up and design validation of products

- Knowledge on the Ethernet protocol

- Experience with access switch Ethernet interfaces: gigabit, multi gigabit, 10 gigabit

- Experience with high speed Ethernet interfaces: 25G, 100G, 400G, 800G

- Experience with DRAM, CPU subcomplex and control interfaces such as PCIe, I2C, SPI, MDC/MDIO

In terms of compensation, the starting salary range for this position is $171,600.00 to $245,000.00, reflecting the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation, equity, or benefits.

## Skills

### Required
- Electrical Engineering
- Computer Engineering
- Telecommunications
- FPGA design
- ASIC/System level bring up
- troubleshooting
- schematics/layout
- Hardware bring-up
- system level testing

### Nice to have
- Verilog HDL/VHDL design
- Python
- Tcl
- Ethernet protocol
- gigabit
- multi gigabit
- 10 gigabit
- 25G
- 100G
- 400G
- 800G
- PCIe
- I2C
- SPI
- MDC/MDIO

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Source: [Apply at cisco.wd5.myworkdayjobs.com](https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/Hardware-Design-Engineer-Technical-Lead_2014522-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)
