# High-Speed SERDES Layout Specialist

**Company**: Synopsys
**Location**: Noida, Uttar Pradesh, India
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/noida/high-speed-serdes-layout-specialist/44408/91299418752
**Canonical**: https://yubhub.co/jobs/job_a4f15f43-d71

## Description

We are seeking a highly skilled High-Speed SERDES Layout Specialist to join our team. As a key member of our design team, you will be responsible for designing and implementing custom analog layout for high-speed SERDES blocks, including TX, RX, and PLLs, in advanced technology nodes.

## What you'll do

- Designing and implementing custom analog layout for high-speed SERDES blocks, including TX, RX, and PLLs, in advanced technology nodes.

- Developing floor plans, optimizing power distribution networks, and executing signal routing strategies with a focus on EMIR, parasitic minimization, and yield improvement.

## What you need

- 5+ years of hands-on experience in custom analog layout, with a focus on High-Speed SERDES (TX/RX/PLL) in deep submicron technologies.

- Proficiency in floor planning, power grid design, signal routing, and parasitic optimization.

- Expertise in industry-standard EDA tools for layout and verification (e.g., Cadence Virtuoso, Mentor Calibre, Synopsys IC Compiler).

- Strong understanding of EMIR, DRC, LVS, ERC, ANT, ESD, DFM, and PERC verification methodologies.

## Skills

### Required
- custom analog layout
- high-speed SERDES
- floor planning
- power grid design
- signal routing
- parasitic optimization
- EDA tools
- EMIR
- DRC
- LVS
- ERC
- ANT
- ESD
- DFM
- PERC

### Nice to have
- package-level design
- interposer and RDL layout