# Silicon Engineering Technical Lead

**Company**: Cisco
**Location**: Milpitas, California
**Experience**: senior
**Job type**: full-time
**Salary**: $171,600.00 - $245,000.00
**Category**: Engineering
**Industry**: Technology

**Apply**: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Milpitas-California-US/Silicon-Engineering-Technical-Lead_2027457-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/job/silicon-engineering-technical-lead-a3ee7b3b-a7c/

## Description

Join a team at Cisco that integrates new silicon architecture, supports new product development to volume production, performs manufacturing test validation, and system deployment for next-generation high-speed networking products.

As a Silicon Engineering Technical Lead, you will conduct root-cause analysis from system-level failures down to silicon behavior. You will develop silicon validation and characterization of functional coverage, performance, stress, corner-case, and interoperability testing. Your role involves establishing silicon performance margins and operating limits, and correlating silicon characterization data with system-level behavior.

Responsibilities:

- Conduct root-cause analysis from system-level failures down to silicon behavior

- Develop silicon validation and characterization of functional coverage, performance, stress, corner-case, and interoperability testing

- Establish silicon performance margins and operating limits

- Correlate silicon characterization data with system-level behavior

- Support manufacturing failure analysis and containment of silicon

- Influence coverage through ATE, wafer-level, and package-level testing

Minimum Qualifications:

- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field

- 5 years of experience in silicon engineering, ASIC validation, or a related technical domain

- Experience with silicon architecture and performance characterization

- Knowledge of signal integrity and high-speed SerDes

- Experience conducting root-cause analysis from system-level failures to silicon behavior

- Experience with Design for Testability (DFT), scan, MBIST, LBIST, boundary scan/JTAG, and production test methodologies

Preferred Qualifications:

- Master's degree in Electrical Engineering, Computer Engineering, or a related field

- Experience with automated test equipment (ATE), wafer-level testing, and package-level testing

- Experience correlating silicon characterization data with system-level behavior

- Experience early silicon bring up characterization

- Experience collaborating with cross-functional teams including ASIC, optics, hardware, firmware, and manufacturing

- Excellent communication skills to work with stakeholders

Benefits:

- Medical, dental, and vision insurance

- 401(k) plan with a Cisco matching contribution

- Paid parental leave

- Short and long-term disability coverage

- Basic life insurance

- Paid time away (10 paid holidays, 1 floating holiday, 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness)

- Optional 10 paid days per full calendar year to volunteer

Salary Range: $171,600.00 - $245,000.00

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## Skills

### Required
- Electrical Engineering
- Computer Engineering
- silicon engineering
- ASIC validation
- DFT
- scan
- MBIST
- LBIST
- boundary scan/JTAG

### Nice to have
- automated test equipment (ATE)
- wafer-level testing
- package-level testing
- early silicon bring up characterization

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Source: [Apply at cisco.wd5.myworkdayjobs.com](https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Milpitas-California-US/Silicon-Engineering-Technical-Lead_2027457-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)