# ML HW-SW Co-design Software Manager

**Company**: Google DeepMind
**Location**: Mountain View, California, US
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Wikidata**: https://www.wikidata.org/wiki/Q15733006

**Apply**: https://job-boards.greenhouse.io/deepmind/jobs/7558868
**Canonical**: https://yubhub.co/jobs/job_a3415fac-8d5

## Description

We are seeking a highly motivated and experienced Software Engineering Manager to join our HW-SW Co-design team and drive groundbreaking advances for machine learning acceleration.

At Google DeepMind, we've built a unique culture and work environment where long-term ambitious research can flourish. We are a team of scientists, engineers, machine learning experts and more, working together to advance the state of the art in artificial intelligence.

The role requires a blend of deep technical expertise, strategic thinking, and strong leadership. You will lead a multi-disciplinary team to evolve the software side of our hw-sw co-design project.

Responsibilities:

* Closely collaborate with our hardware team to define and drive strategy for next-generation machine learning accelerators.
* Manage relationships and technical execution across a virtual team that spans both Google and outside partners.
* Drive the team to deliver high-quality aligned to tight schedules.

Minimum Qualifications:

* Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
* 10+ years of experience in ASIC design and development.
* 3+ years of Management Experience
* Proven track record of technical leadership and successfully delivering complex silicon projects (tape-outs) to production.
* Deep expertise in at least one core silicon discipline (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow.
* Experience with managing silicon vendors and other external partners.

Preferred Qualifications:

* Master's or Ph.D. in a related field.
* Experience leading and managing teams across the full silicon development cycle, from RTL to bringup.
* Experience with high-performance compute IPs (e.g., GPUs, ML accelerators).
* Knowledge of high-performance and low-power architectures for ML acceleration.
* Excellent communication, and leadership skills.

## Skills

### Required
- ASIC design and development
- RTL
- PD
- DV
- Silicon vendors management
- External partners management
- Technical leadership
- Complex silicon projects delivery

### Nice to have
- Master's or Ph.D. in a related field
- Experience leading and managing teams
- High-performance compute IPs
- High-performance and low-power architectures for ML acceleration
- Excellent communication, and leadership skills