# DFT Methodology Engineer

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/DFT-Methodology-Engineer_JR2020884?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_9ec39577-360

## Description

We are seeking a DFT Methodology Engineer to join our team at NVIDIA. As a DFT Methodology Engineer, you will work on implementing state-of-the-art designs in test access mechanisms, I1149.1, I1500, I1687, 1838, memory BIST, scan and memory dump, and DFX security methodology.

You will own and work with cross-functional teams to architect, develop, and deploy DFT methodologies for our next-generation products, including RTL design, verification, pattern generation, and partnering with teams like timing, physical design, software, bring-up, and production.

Additionally, you will mentor junior engineers on test designs and trade-offs, including cost and quality.

The ideal candidate will have a Master's degree in Electrical Engineering or a related field with proven experience in DFT or related domains. You should have 10+ years of hands-on experience in SoC architecture, RTL design, and verification, with excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs using vendor tools.

Good exposure to cross-functional areas, including RTL & clocks design, STA, place-n-route, and power, is required to ensure the right trade-offs are made. Experience in silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development is also necessary.

Knowledge of DFT security and hardware system security is a plus. Exceptional written and oral interpersonal skills with the curiosity to work on rare challenges are essential.

NVIDIA offers highly competitive salaries and a comprehensive benefits package, including equity and benefits.

## Skills

### Required
- DFT
- SoC architecture
- RTL design
- verification
- analytical skills
- vendor tools
- cross-functional areas
- silicon debug
- bring-up on ATE
- pattern formats
- failure processing
- test program development

### Nice to have
- DFT security
- hardware system security

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/DFT-Methodology-Engineer_JR2020884?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)