# ASIC Design Verification Engineer, Sr. Staff-18856

**Company**: Synopsys
**Location**: Nepean, Ontario
**Experience**: senior
**Job type**: employee
**Salary**: $122000-$183000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/nepean/asic-design-verification-engineer-sr-staff-18856/44408/100837408944?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_984e5a53-552

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You are a skilled and driven ASIC Digital Verification Engineer with a passion for advancing technology and solving complex problems. With a strong foundation in digital design and verification, you bring hands-on experience verifying complex ASIC designs and using advanced methodologies such as System Verilog and UVM to deliver thorough, high-quality results.

**Responsibilities:**

- Develop and execute verification plans for complex ASIC designs, with a focus on next-generation HBM products, while writing and maintaining robust testcases using System Verilog and UVM

- Debug complex testbench and design issues, collaborate closely with design and mixed-signal engineering teams, and help drive issue resolution across the verification flow

- Automate verification flows and processes using scripting languages such as Python or Perl to improve efficiency, coverage, and productivity

- Contribute to design, architecture, and code reviews while documenting verification results, sharing best practices, and supporting team knowledge growth

- Documenting verification results, methodologies, and lessons learned to support knowledge sharing and process improvement.

**The Impact You Will Have:**

- Help accelerate the development of high-performance, reliable HBM solutions for next-generation computing and AI applications

- Ensure the delivery of robust, high-quality silicon through strong verification planning, debugging, and execution

- Improve engineering effectiveness by advancing verification methodologies, identifying issues early, and contributing to continuous process improvement

- Strengthen team capability through collaboration, knowledge sharing, and technical contribution across the verification organization

**Requirements:**

- BSEE or MSEE with 6+ years of digital design and verification experience

- Proven experience writing and maintaining testcases using System Verilog and UVM, along with strong debugging skills for complex testbench and design issues

- Solid understanding of digital circuit design concepts and proficiency with scripting languages such as Python or Perl for automation and workflow improvement

- Demonstrated ability to work independently and collaboratively in a dynamic engineering environment

**Benefits:**

- Comprehensive medical and healthcare plans that work for you and your family

- In addition to company holidays, we have ETO and FTO Programs

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more

- Purchase Synopsys common stock at a 15% discount, with a 24-month look-back

- Save for your future with our retirement plans that vary by region and country

- Competitive salaries

## Skills

### Required
- System Verilog
- UVM
- Python
- Perl
- digital design
- verification

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/nepean/asic-design-verification-engineer-sr-staff-18856/44408/100837408944?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)