# SOC Engineering, Principal Engineer (STA)

**Company**: Synopsys
**Location**: Bengaluru
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/bengaluru/soc-engineering-principal-engineer-sta/44408/94297252384?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_895a84d4-7a9

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

We are looking for a passionate and driven STA Expert with a strong technical leadership and execution skills in Static Timing Analysis and design timing & power closure flows and methodologies. You will independently own and drive signoff static timing analysis and timing closure for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.

Key Responsibilities:

- Independently own and drive signoff static timing analysis and timing closure for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.

- Execute static timing analysis (STA), power analysis, synthesis and timing/power closure to meet stringent performance and power targets.

- Develop and validate timing constraints at block-level or Full SoC level.

- Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.

Requirements:

- Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.

- 12+ years of relevant experience in static timing analysis, particularly in advanced technology nodes (7nm/5nm/3nm).

- Comprehensive hands-on experience of constraints development, validation, static timing analysis (STA), power analysis, Timing and power ECO generation.

- Proficiency with Synopsys EDA tools such as PrimeTime, PT-PX, PrimeClosure, Tweaker.

- Strong scripting and automation skills using Python, PERL, TCL, or similar languages.

As a Principal Engineer at Synopsys, you will play a key role in empowering customers to achieve their silicon goals while contributing to Synopsys’ leadership in the industry.

Rewards and Benefits:

- We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

- Your recruiter will provide more details about the salary range and benefits during the hiring process.

## Skills

### Required
- static timing analysis
- eda tools
- python
- perl
- tcl
- synopsys tools

### Nice to have
- scripting
- automation
- timing constraints
- power analysis
- synthesis

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/bengaluru/soc-engineering-principal-engineer-sta/44408/94297252384?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)