# Senior Custom SOC/IP Verification Engineer

**Company**: NVIDIA
**Location**: Shanghai
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/China-Shanghai/Senior-Custom-SOC-IP-Verification-Engineer_JR2019424?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_8256e7af-c6d

## Description

NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation NVLink Fusion semi-custom silicon. You will be responsible for ASIC design verification for various IPs at IP and SOC levels, reference model development and integration, and participating in IP/SOC architecture reviews.

**Responsibilities:**

- Responsible for ASIC design verification for various IPs at IP and SOC levels

- Responsible for reference model development and integration

- Participate in IP/SOC architecture, micro-architecture reviews, interface with Architecture, SW/FW, Design, and Modeling to work out comprehensive first-time right verification plans

- Contribute to the innovative verification methodology development, functional and code coverage closure

- Work on the complex TB creation, direct/random tests and drive the function and coverage to closure

- Contribute to the development of silicon and platform verification strategy and methodology

- Triage the fail on SOC level with SOCV/EMU/SW team

- Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection, and IP licensing

**Requirements:**

- Clear understanding of complexities involved with various design verification tools, including Synopsys VCS or Cadence Xcelium Simulator, Verdi, JasperGold or VC Formal

- Track record of first-pass success in ASIC Development

- B.S. or M.S. degree in Computer Engineering or Electrical Engineering

- Experience working across multiple projects and adjusting priorities in partnership with stakeholders

- 5+ years of experience owning processing ASIC, IP or SoC design verification

- Experience managing and delivering complex mixed language UVM and C++ testbenches

- Ability to interpret functional specs and creating comprehensive test plans

- Ability to write directed and constraint random test to achieve coverage-driven verification closure

- Strong programming skills in C++/SystemC. Familiar with the GDB debugging

- Experience developing tools and infrastructure using Perl or Python

**Preferred Qualifications:**

- Hands-on background with AMBA protocols such as AXI, ACE, CHI, etc.

- Hands-on experience with complex subsystems in new technologies like ARM CPU complex, LPDDR, HBM, GPU’s, UCIE, PCIE or Network on chip and with performance verification

## Skills

### Required
- ASIC design verification
- Synopsys VCS
- Cadence Xcelium Simulator
- Verdi
- JasperGold
- VC Formal
- C++
- SystemC
- Perl
- Python
- GDB debugging
- UVM
- AMBA protocols

### Nice to have
- ARM CPU complex
- LPDDR
- HBM
- GPU's
- UCIE
- PCIE
- Network on chip
- performance verification

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/China-Shanghai/Senior-Custom-SOC-IP-Verification-Engineer_JR2019424?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)