# ASIC STA Technical Lead

**Company**: Cisco
**Location**: San Jose, California
**Work arrangement**: hybrid
**Experience**: senior
**Job type**: full-time
**Salary**: $186,900.00 - $267,700.00
**Category**: Engineering
**Industry**: Technology

**Apply**: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/ASIC-DFT-STA-Technical-Lead_2017857?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_80c89bea-9eb

## Description

The Silicon One team at Cisco is looking for an ASIC DFT STA Technical Lead. You will be part of the Silicon One development organization, working on innovative hardware platforms central to the AI era. Your role involves leading the DFT and quality process through the entire implementation flow and post-silicon validation phases.

Responsibilities:

- Collaborate with cross-functional teams and communicate complex timing data clearly.

- Develop and verify timing constraints, such as clock groups and exceptions.

- Work with RTL design, CDC/RDC, and conformal verification.

- Experience with SDC development and timing constraint verification.

- Programming experience with at least 2 of the following scripting languages: Perl, TCL, Python, or Makefile.

Benefits:

- Medical, dental, and vision insurance

- 401(k) plan with Cisco matching contribution

- Paid parental leave

- Short and long-term disability coverage

- Basic life insurance

- Flexible vacation time off program

- Paid holidays and personal wellness days

- Opportunities for professional growth and development

Salary Range: $186,900.00 - $267,700.00

## Skills

### Required
- RTL design
- CDC/RDC
- conformal verification
- SDC development
- timing constraint development
- Perl
- TCL
- Python
- Makefile

### Nice to have
- TSMC memory timing constraints
- PCIE timing constraints
- Synopsys TCM/Primetime
- Synopsys Fusion/design Compiler
- Tessent tool

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Source: [Apply at cisco.wd5.myworkdayjobs.com](https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/ASIC-DFT-STA-Technical-Lead_2017857?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)