# Senior Power and Performance Engineer **Company**: NVIDIA **Location**: Shanghai **Work arrangement**: onsite **Experience**: senior **Job type**: full-time **Category**: Engineering **Industry**: Technology **Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/China-Shanghai/Senior-Power-and-Performance-Engineer_JR2019124?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply **Canonical**: https://yubhub.co/jobs/job_78c8bfa9-a87 ## Description ## Senior Power and Performance Engineer Apply locationsChina, Shanghai time typeFull time posted onPosted Today job requisition idJR2019124 NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. ### What You'll Be Doing: - Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products. - Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. - Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. - Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. - Lead debug efforts, develop workarounds, and support bringup, validation, manufacturing, and customer escalations. - Utilize AI-driven techniques to enhance performance prediction models and power management strategies. ### What We Need to See: - BS or MS in EE/CE (or equivalent experience). - 8+ years of experience with a strong focus on performance and power management on one or two of below areas that optimize power for perf-per-watt efficiency in datacenter or client systems: DVFS, power gating, clock policy, sequencing, throttling, control systems, boot/reset. - Strong EE fundamentals on digital design, low power design, DVFS, control systems, power management techniques, timing, and architecture. - Knowledge of PVT dependencies, binning methodologies, and VF characterization. - Solid understanding of firmware/driver structures and HW/SW interaction with different IPs, including their impact on power, latency, and reliability. - Hands-on lab experience (oscilloscopes, multimeters, logic analyzers) and silicon bringup exposure are a bonus. - Programming proficiency in C/C++, Python, or Perl in Windows/Linux environments. - Strong problem-solving, collaboration, and communication skills. - Leverage AI to perform advanced optimization accelerate analysis, workflows, generate and review scripts, synthesize technical documentation, and explore solution spaces faster. - Utilize machine learning algorithms to predict power consumption and performance based on workload characteristics. - Implement AI-driven tools for automating data collection and analysis during validation and characterization phases. - Explore creative ways to integrate AI insights into continuous improvement of power and performance metrics. ### Ways to Stand Out from the Crowd: - Demonstrated cross-functional leadership , experience driving alignment across architecture, silicon, firmware, and software teams on complex, ambiguous problems. - System-level intuition , the ability to reason about power and performance holistically, not just at the block level, and to translate architectural tradeoffs into clear engineering decisions. - Published research or patents in power management or related fields. - Experience with modeling and simulation tools for performance validation at scale and familiarity with the latest advancements in AI and their applications in power and performance optimization. - Contributions to open-source projects or communities in low-power design methodologies. Our team is at the forefront of silicon innovation, advancing groundbreaking technologies. We offer a dynamic work environment where your contributions will directly impact the company's success. Join us to advance your career in a role where you can truly make a difference. With competitive salaries and a generous benefits package, we are widely considered one of the technology industry’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us, and due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you! NVIDIA pioneered accelerated computing. Today, our AI infrastructure powers global intelligence, transforming every industry. Learn more about NVIDIA. - X - Facebook - Glassdoor - LinkedIn - YouTube ## Skills ### Required - BS or MS in EE/CE - 8+ years of experience with performance and power management - DVFS, power gating, clock policy, sequencing, throttling, control systems, boot/reset - digital design, low power design, DVFS, control systems, power management techniques, timing, and architecture - PVT dependencies, binning methodologies, and VF characterization - firmware/driver structures and HW/SW interaction with different IPs - oscilloscopes, multimeters, logic analyzers - C/C++, Python, or Perl in Windows/Linux environments - problem-solving, collaboration, and communication skills - AI-driven techniques, machine learning algorithms, and AI-driven tools --- Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/China-Shanghai/Senior-Power-and-Performance-Engineer_JR2019124?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)