# R&D Engineering, Staff Engineer (C/C++ , Data Structures, Algorithms)

**Company**: Synopsys
**Location**: Bengaluru
**Work arrangement**: onsite
**Experience**: staff
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/bengaluru/r-and-d-engineering-staff-engineer-c-c-data-structures-algorithms/44408/93448329808?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_78918583-073

## Description

You are an experienced engineer with a passion for solving complex technical challenges and a deep interest in shaping the future of semiconductor design. With a strong background in algorithm development, software engineering, and electronic design automation (EDA) tools, you thrive in collaborative environments where innovation and precision are paramount.

Designing and analysing algorithms for end-to-end timing constraint management across the Synopsys flow, driving the success and evolution of Synopsys' constraint flow and tools, enhancing product performance and integration.

Collaborating within a highly skilled engineering team to deliver innovative solutions for static timing analysis (STA) during design and optimisation.

Designing, developing, troubleshooting, and debugging advanced software programs for constraint generation and verification.

Architecting, developing, and testing constraint management solutions, contributing to the advancement of R&D software development.

Integrating source code and analysing integration strategies to ensure seamless functionality within Synopsys products.

Gathering requirements from stakeholders and executing them according to software specifications.

Optimising the development cycle for building integrated PrimeTime (PT)/Timing Constraint Management (TCM) solutions.

Designing and developing features for high-performance, high-capacity constraint analysis and generation tools.

Accelerate the development of next-generation timing constraint solutions, directly influencing the success of Synopsys’ EDA offerings.

Enhance the reliability and performance of chip design flows, empowering customers to achieve optimal results.

Drive innovation by implementing robust algorithms that enable accurate timing constraint management from RTL to gate-level sign-off.

Contribute to seamless product integration, improving user experience across Synopsys’ suite of design tools.

Champion key customer requests, ensuring that their needs are met and their feedback shapes future product advancements.

Support the advancement of design methodologies, positioning Synopsys as a leader in constraint management and STA technology.

Foster collaboration between engineering, applications, and management teams, strengthening Synopsys’ culture of innovation.

## Skills

### Required
- C/C++
- Data Structures
- Algorithms
- Static Timing Analysis (STA)
- Electronic Design Automation (EDA) tools
- Constraint Generation and Verification
- Software Development
- Integration Strategies
- Requirements Gathering

---

Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/bengaluru/r-and-d-engineering-staff-engineer-c-c-data-structures-algorithms/44408/93448329808?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)