# Senior DFT Engineer - Post-Silicon

**Company**: NVIDIA
**Experience**: senior
**Job type**: full-time
**Salary**: 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-DFT-Engineer_JR2026202?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_771345ca-3d2

## Description

As a Senior DFT Engineer - Post-Silicon, you will take pioneering DFT capabilities beyond implementation,connecting silicon behavior, test data, and product learning to deliver robust, production-ready DFT solutions for NVIDIA’s most advanced chips.

You will drive post-silicon enablement of DFT capabilities from initial silicon bring-up through production ramp and lifecycle support. You will develop data-driven approaches to analyze test results, quality indicators, yield behavior, and test efficiency; translate findings into practical technical recommendations.

Key responsibilities include:

- Influencing DFT architecture and implementation by communicating post-silicon requirements early with clear metrics and what-if analysis

- Defining and improving methodologies for silicon bring-up, failure analysis, test-content validation, and production deployment

- Helping productize new DFT capabilities by establishing scalable flows, validation criteria, debug procedures, and documentation

- Contributing to modeling and analysis that supports test-time optimization, quality improvement, yield learning, and test power

- Partnering across design, product development, and test teams to align pre-silicon trade-offs with post-silicon execution

Requirements:

- BSEE (or equivalent experience) with 8+ years or MS with 6 years of experience in a related field

- Solid understanding of DFT concepts, silicon test, and the relationship between design implementation, test content, and post-silicon behavior

- Experience with silicon bring-up, debug, validation, production test, or engineering analysis of semiconductor devices

- Ability to analyze complex datasets and use statistical or analytical approaches to identify trends, isolate issues, and support engineering decisions

- Familiarity with automated test environments and test-program flows

- Understanding of semiconductor fundamentals, including device behavior, process variation, and the impact of operating conditions on silicon results

- Strong written and oral communication skills, with an ability to collaborate effectively across technical disciplines

NVIDIA offers highly competitive salaries and a comprehensive benefits package. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

## Skills

### Required
- DFT
- silicon test
- semiconductor devices
- analytical approaches
- statistical analysis
- automated test environments

### Nice to have
- scan
- ATPG
- MBIST
- silicon characterization
- manufacturing test
- scalable engineering workflows
- automation
- dashboards
- analysis tools

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-DFT-Engineer_JR2026202?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)