# SerDes Analog & DSP System, Architect

**Company**: Synopsys
**Location**: Boxborough, Massachusetts
**Experience**: senior
**Job type**: full-time
**Salary**: $192000-$288000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/boxborough/serdes-analog-and-dsp-system-architect-18616/44408/102916703856?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/job/serdes-analog-and-dsp-system-architect-75014977-ff8/

## Description

We are seeking a visionary and detail-oriented architect to lead the design and development of SerDes IP for PAM4 transceivers targeting PCIe and Ethernet applications.

As a SerDes Analog & DSP System Architect at Synopsys, you will own the architecture of SerDes IP, interpret SerDes standards, develop system models and link budgets, and lead the design of analog macro-level circuits.

Your responsibilities will include:

- Developing and implementing SerDes IP for PAM4 transceivers

- Designing and verifying analog and DSP components

- Leading a team of engineers and collaborating with cross-functional teams

- Developing and presenting technical insights to peers and customers

- Mentoring junior engineers and contributing to the company's talent pipeline

The ideal candidate will have:

- PhD or MSc with 10+ years of experience in SerDes/high-speed analog and mixed-signal design

- Silicon-proven, transistor-level design experience in TX, RX, and clock paths within SerDes architectures

- In-depth knowledge of SerDes sub-circuits and DSP/communications theory

- Strong experience with EDA tools, SPICE simulators, and programming languages such as Verilog-A, SystemVerilog, C, TCL, and Python

We offer a comprehensive range of health, wellness, and financial benefits, including competitive salaries, bonuses, and equity.

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## Skills

### Required
- SerDes
- analog circuit design
- DSP
- communications theory
- MATLAB/Simulink
- Verilog-A
- SystemVerilog
- C
- TCL
- Python
- SPICE simulators

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/boxborough/serdes-analog-and-dsp-system-architect-18616/44408/102916703856?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)
