# Senior Design Verification Engineer

**Company**: NVIDIA
**Location**: Bengaluru
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/India-Bengaluru/Senior-Design-Verification-Engineer_JR2021993?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_70500250-64b

## Description

NVIDIA is seeking a talented Senior Verification Engineer to join the Holoscan FPGA team, responsible for verifying next-generation FPGA-based solutions that accelerate real-time processing and connectivity for advanced healthcare, robotics, edge AI, and automotive systems.

This role offers the opportunity to work on cutting-edge platforms within NVIDIA Holoscan, collaborating with world-class engineers to develop and validate technologies that power the future of intelligent machines and edge computing.

**Responsibilities:**

- Responsible for verification of Holoscan Edge compute FPGA designs.

- Technical leadership role to define, plan, implement, and execute verification strategy of complex design.

- Ability to delve into lowest level details of ASIC/FPGA design specification, implementation, and its system-level impact.

- Collaborate closely with design and architecture teams to verify architectural and microarchitectural features.

- Define and create a scalable constrained-random verification environment using SystemVerilog and UVM methodologies.

- Drive stimulus, comprehensive coverage strategy to show continuous progress towards product milestones.

- Analyze and improve existing verification strategies by incorporating AI-accelerated workflows to enhance efficiency and effectiveness.

**Requirements:**

- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.

- At least 3+ years of experience in ASIC verification.

- Experience or knowledge with SystemVerilog, SVA, or functional coverage.

- Excellent communication and teamwork abilities.

- Proficiency in script languages like Python or Perl.

- Strong understanding of verification methodologies and tools.

- Outstanding problem-solving skills and attention to detail.

**Preferred Qualifications:**

- Prior experience in FPGA subsystem verification.

- Exposure to high-speed protocols like MIPI, Ethernet, USB, PCIe.

- Experience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan / VC Formal).

## Skills

### Required
- ASIC verification
- SystemVerilog
- SVA
- functional coverage
- Python
- Perl
- verification methodologies

### Nice to have
- FPGA subsystem verification
- MIPI
- Ethernet
- USB
- PCIe
- formal property checking tools

---

Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/India-Bengaluru/Senior-Design-Verification-Engineer_JR2021993?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)