# ASIC Design Engineer 2

**Company**: Hewlett Packard Enterprise
**Location**: Sunnyvale, California
**Work arrangement**: onsite
**Experience**: entry
**Job type**: full-time
**Salary**: $105,500 - $213,500 per year
**Category**: Engineering
**Industry**: Technology

**Apply**: https://hpe.wd5.myworkdayjobs.com/en-US/Jobsathpe/job/Sunnyvale-California-United-States-of-America/ASIC-Design-Engineer-2_1211208-2?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_6de581dd-6fb

## Description

ASIC Design Engineer 2 role at Hewlett Packard Enterprise's Juniper Silicon group, a leading provider of advanced routers and switches for the internet.

You will design high-speed ASICs, from specifications to final netlist, and have the opportunity to work on design, verification, or timing closure/PD.

Responsibilities:

- Create detailed micro-architecture specifications from functional specifications

- Perform RTL coding using System Verilog

- Write functional coverage/SVA

- Work on timing closure with PD to identify and fix timing issues in RTL

- Debug issues in your block found by the verification team

- Use state-of-the-art EDA tools for various design checks

Recommended skills:

- Bachelor's degree in Electrical Engineering required, Master's strongly desired

- Strong analytical/problem-solving skills

- Courses in digital logic design

- Strong coding skills in Verilog/System Verilog

- Knowledge of Computer Architecture, networking protocols, or machine learning is a plus

- Excellent written and verbal communications skills

- Knowledge of Perl/Python is a plus

The expected salary/wage range for this position is $105,500 - $213,500 per year.

HPE offers a comprehensive suite of benefits that supports physical, financial, and emotional wellbeing, as well as programs for personal and professional development.

## Skills

### Required
- Electrical Engineering
- digital logic design
- Verilog
- System Verilog
- analytical skills
- problem-solving skills

### Nice to have
- Computer Architecture
- networking protocols
- machine learning
- Perl
- Python

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Source: [Apply at hpe.wd5.myworkdayjobs.com](https://hpe.wd5.myworkdayjobs.com/en-US/Jobsathpe/job/Sunnyvale-California-United-States-of-America/ASIC-Design-Engineer-2_1211208-2?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)