# Senior ASIC Design Engineer - Hardware

**Company**: NVIDIA
**Location**: Austin
**Work arrangement**: hybrid
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-TX-Austin/Senior-ASIC-Design-Engineer---Hardware_JR2008535?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_6d4fea70-398

## Description

Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across multiple projects!

As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world!

**What you'll be doing:**

- Be an integral part of the team defining, developing, and delivering system-level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs

- Define, develop, and automate flows and methodologies to efficiently build, deliver, and support a system-level IP

- Deliver IP and support projects by applying the performance monitoring system

- Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more)

- Design and implement RTL features (microarchitecture and RTL)

- Work with architects, designers, and software engineers to accomplish your tasks

**What we need to see:**

- BS or equivalent experience in Electrical Engineering, Computer Engineer, or related degree required, advanced degrees (MS, PhD) a plus

- 3+ years of relevant industry experience and strong coding skills in Perl/Python or other industry-standard scripting languages

- Experience in RTL design (Verilog), verification (SystemVerilog), System-On-Chip design/implementation flow, and design automation

- Good understanding of SOC architecture, including CDC, multiple-power domains, performance analysis, latency, and data flow

- Excellent debugging and analytical skills

- Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)

- Great communication and collaboration skills to interact within the team and with cross-functional teams

**Ways to stand out from the crowd:**

- Hands on experience in object-oriented programming

- Prior design on system level IP (Clocks/DFT/Resets)

- Experience developing methodologies used by others

- Hands-on silicon debug is a plus.

- Exposure to physical design

## Skills

### Required
- RTL design
- verification
- System-On-Chip design/implementation flow
- design automation
- Perl/Python
- object-oriented programming
- physical design

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-TX-Austin/Senior-ASIC-Design-Engineer---Hardware_JR2008535?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)