# ATE Test Engineer

**Company**: NVIDIA
**Location**: Hsinchu
**Work arrangement**: onsite
**Experience**: mid
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/Taiwan-Hsinchu/ATE-Test-Engineer_JR2008160?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_6b65762b-646

## Description

We are looking for a creative ATE Test Engineer to join our team. As an ATE Test Engineer, you will be responsible for defining, developing, implementing, and supporting ATE test programs for our latest GPU, Tegra, and Automotive products. You will work closely with overseas manufacturing teams to increase yields, test coverage, and capacity, and reduce production costs.

Responsibilities:

- Define, develop, implement, and support ATE test program bringup, characterization, and production for our latest GPU/Tegra/Automotive products.

- Construct or enhance test methods, debug, and integrate timings/levels/patterns/TM and test flow into a test program.

- Own test methodologies and strive for continuous improvement of production testprogram quality/efficiency.

- Demonstrate good understanding of LB schematics and design to aid debug.

- Actively participate with cross-functional teams including Product Development Engineering, DFT, and IC design to efficiently debug product failures and implement optimal solutions.

- Write and maintain scripts/tools for the test engineering group, enhance the group's overall productivity and effectiveness.

Requirements:

- Bachelor Degree or higher in Electrical Engineering/Computer Engineering (or equivalent experience).

- 3+ years of relevant experience in IC Design, application, or ATE testing of VLSI.

- Working knowledge and hands-on experience with Advantest 93K ATE platform (SmarTest 8) is essential.

- Critical thinking, good communication, and collaboration skills.

- Excellent debugging and analytical skills.

- Understanding of DFT insertion techniques including SCAN, ATPG, MBIST, and IOBIST.

Preferred Qualifications:

- Analog circuit design, PLL's

- System level testing/validation

- Knowledge of active thermal management

- Product engineering experience, such as yield analysis, vmin/fmax characterization, defect analysis

- Linux operating systems, and programming languages such as Perl/Python and/or C/C++, Java

## Skills

### Required
- Advantest 93K ATE platform
- SmarTest 8
- DFT insertion techniques
- SCAN
- ATPG
- MBIST
- IOBIST
- Linux operating systems
- Perl/Python
- C/C++
- Java

### Nice to have
- Analog circuit design
- PLL's
- System level testing/validation
- Active thermal management
- Product engineering experience
- Yield analysis
- Vmin/fmax characterization
- Defect analysis

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/Taiwan-Hsinchu/ATE-Test-Engineer_JR2008160?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)