# Senior Staff R&D Engineer (DFT Engineer)

**Company**: Synopsys
**Location**: Bengaluru
**Work arrangement**: onsite
**Experience**: senior
**Job type**: employee
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/bengaluru/senior-staff-r-and-d-engineer-dft-engineer/44408/92296851888
**Canonical**: https://yubhub.co/jobs/job_683d0330-14c

## Description

Synopsys is looking for a Senior Staff R&D Engineer to join our advanced DFT team and contribute to the evolution of our Streaming Fabric (SF) and SEQ technologies within the TestMAX product family.

This role is ideal for an engineer who enjoys deep technical work , analysing complex logic simulations, working across hardware and software, and driving improvements in test efficiency and overall QoR. You’ll be hands-on with Verilog, simulation/debug, and C/C++ development, influencing key aspects of next-generation DFT solutions.

Responsibilities:

- Contribute across the entire DFT flow: RTL, netlist, ATPG, and logic simulation
- Analyse DFT IP behaviour, debug logic issues, and deliver robust fixes
- Enhance pattern-generation workflows for better performance and QoR
- Develop C/C++ components for pattern processing, automation, and data handling
- Work closely with multi-site R&D teams to ensure smooth flow integration
- Use AI-based tools to accelerate debugging, code comprehension, and analysis

Requirements:

- Master’s degree in Electronics, Computer Science, or equivalent, with background in both Verilog and C/C++.
- Strong understanding of DFT, scan architectures, and test-generation concepts
- Hands-on experience with Verilog and logic-simulation debug
- Proficiency in C/C++ programming
- Ability to work effectively across large-scale SoC hardware and complex software environments.
- Strong analytical and root-cause-debugging skills
- Openness to using AI tools to boost productivity

Nice to Have:

- Experience with TestMAX, Tessent, Modus, or similar DFT/ATPG tools
- Knowledge of pattern compression, hierarchical DFT, or test scheduling
- Experience with automation or performance-oriented C/C++ code

Why Join Synopsys:

You’ll work on core DFT technologies used by the world’s leading semiconductor companies. Your contributions will directly strengthen the Streaming Fabric and SEQ solution and support their integration into the TestMAX ecosystem , enabling improved scalability, test efficiency, and product quality.

If you’re excited by deep technical challenges and want to work on impactful DFT innovation, we’d love to hear from you.

## Skills

### Required
- Verilog
- C/C++
- DFT
- scan architectures
- test-generation concepts
- logic-simulation debug
- AI-based tools

### Nice to have
- TestMAX
- Tessent
- Modus
- pattern compression
- hierarchical DFT
- test scheduling
- automation
- performance-oriented C/C++ code