# SOC Engineering, Sr Manager

**Company**: Synopsys
**Location**: Noida
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: Competitive salary and benefits package
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/noida/soc-engineering-sr-manager/44408/95240636448?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_6829d780-cf0

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

As a Senior Manager of SOC Engineering, you will lead DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout, working directly with customer design teams.

Key responsibilities include:

- Defining and executing test strategies across scan and ATPG, memory BIST, logic BIST, and analog/PHY test insertion to meet coverage, cost, and yield targets

- Developing DFT methodologies and guidelines using Synopsys EDA tools that solve real customer problems on active service projects

- Providing technical leadership and mentorship to DFT engineers, guiding them through complex integration challenges and design tradeoffs

- Collaborating with cross-functional teams including RTL design, verification, physical design, and timing to ensure testability from architecture through signoff

You will join the Systems Solutions Group (SSG), a team that delivers tool, methodology, architecture, design creation, design verification, and physical implementation expertise to help leading-edge customers complete their most challenging SoC design projects.

The ideal candidate will have a strong background in SOC DFT, with experience leading DFT implementation on complex SoCs that have taped out and gone to production. A deep understanding of the full SoC design flow from microarchitecture definition through RTL design, verification, timing analysis, and physical implementation is also required.

Experience working with cross-functional teams, including design, verification, and physical implementation to resolve testability issues, is highly desirable. Additionally, experience supporting post-silicon debug and working with test engineering teams to refine production test programs is a plus.

If you are a self-directed and resourceful individual with excellent communication skills, who can translate DFT tradeoffs into business impact for project managers and customer stakeholders, then we encourage you to apply for this exciting opportunity.

## Skills

### Required
- SOC DFT
- Test strategy
- DFT methodologies
- EDA tools
- RTL design
- Verification
- Physical design
- Timing analysis

### Nice to have
- Post-silicon debug
- Test engineering
- Production test programs

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/noida/soc-engineering-sr-manager/44408/95240636448?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)