# Senior Digital Design Verification Engineer - Hardware

**Company**: NVIDIA
**Location**: Santa Clara
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Digital-Design-Verification-Engineer---Hardware_JR2013257?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_6701f14a-98a

## Description

We're now looking for a Senior Digital Design Verification Engineer! As a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the design and implementation of our cutting-edge SerDes IPs. This groundbreaking technology will enable and accelerate gaming, artificial intelligence, deep learning, and autonomous driving.

**Responsibilities:**

- Verify the digital design, golden models, and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM.

- Build reusable bus functional models, monitors, checkers, and scoreboards following coverage-driven verification methodology.

- Responsible for understanding the design and implementation, defining the verification scope, developing the verification infrastructure, and verifying the correctness of the design.

- Write and implement test plans and thoroughly verify a design in a product shipment-focused/compressed schedule.

- Work with architects, designers, and pre- and post-silicon verification teams to accomplish your tasks.

**Requirements:**

- Bachelor's or Master's degree (or equivalent experience) in Electrical Engineering, Computer Science, or Computer Engineering.

- At least 5 years of validated experience.

- Background in verification at Unit/Sub-system/SOC level and expertise in SystemVerilog a must.

- Experience using random stimulus along with functional coverage and assertion-based verification methodologies a must.

- Experience in verification methodologies like UVM/VMM and exposure to industry-standard verification tools for simulation and debug.

**Nice to Have:**

- Expertise in bus or interconnect protocols (e.g., PCI Express, USB, SATA) a huge plus.

- Experience in verifying complex SerDes systems, understanding mixed-signal designs, and having experience in modeling of analog circuits a huge plus.

- Perl, Python, C/C++ programming language experience.

- Good debugging and analytical skills.

- Good interpersonal skills & dream to work as a phenomenal teammate.

You will also be eligible for equity and benefits.

## Skills

### Required
- SystemVerilog
- UVM
- VMM
- random stimulus
- functional coverage
- assertion-based verification
- Perl
- Python
- C/C++

### Nice to have
- PCI Express
- USB
- SATA
- SerDes
- mixed-signal designs
- analog circuits

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Digital-Design-Verification-Engineer---Hardware_JR2013257?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)