# Verification Engineer, Emulation and Prototyping

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Verification-Engineer--Emulation-and-Prototyping_JR2021189?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_5dc97ca4-5e9

## Description

We are seeking a Verification Engineer, Emulation & Prototyping to join our team onsite in Santa Clara, CA. As a Verification Engineer, you will play a crucial role in validating ASICs at NVIDIA by creating close to real workloads to ensure chip reliability.

**Job Description:**

You will build emulation and FPGA environments by making RTL FPGA/emulation-friendly, partitioning the design, and taking it through synthesis, place-and-route, and emulator compilation flows.

Your responsibilities will include:

- Improving performance of emulation and FPGA platforms, analyzing timing/performance bottlenecks, and generating bitstreams/images.

- Bringing new DV Test benches that can provide high-level abstraction of C/SV TB, running at FPGA speeds.

- Bringing up designs on hardware emulation & FPGA platforms and driving complex debug and problem-solving activities.

- Scaling emulation/FPGA verification methodology to cater to extensive test plans.

- Working closely with architects, designers, verification engineers, validation teams, and software teams to accomplish project goals.

- Enabling pre-silicon software development, validation, and performance analysis using hardware emulation & FPGA environments.

- Developing and optimizing emulation-friendly validation infrastructures, including high-performance software interfaces and scalable debug methodologies.

**Requirements:**

- BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 5+ years of experience, or MS with 3+ years of proven experience in FPGA prototyping and/or hardware emulation.

- Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.

- Hands-on experience with Simulators or Emulators across vendors.

- Hands-on experience with emulation platforms such as Synopsys ZeBu, Siemens Veloce Synopsys, or Cadence Z3.

- Extensive knowledge of writing SV/Verilog code for TB-Emulator, high-speed integrations.

- Understanding of industry-standard protocols such as PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU coherency.

- Strong expertise in crafting and optimizing emulation-friendly C/C++ testbenches and transactors.

**Nice to Have:**

- Ability to actively code in C/C++, Python, and Perl.

- Prior experience with hardware emulation or prototyping platforms (Synopsys HAPS, ZeBu, Siemens Veloce) of a high-performance processor or SOC.

- Understanding of performance-sensitive validation methodologies for large-scale emulation environments.

You will also be eligible for equity and benefits.

## Skills

### Required
- FPGA prototyping
- hardware emulation
- RTL design
- synthesis
- place-and-route
- emulator compilation
- SV/Verilog
- C/C++
- Python
- Perl
- PCIe
- CXL
- NVLINK
- USB
- CHI
- CPU-GPU coherency

### Nice to have
- Synopsys ZeBu
- Siemens Veloce Synopsys
- Cadence Z3
- ProtoCompiler
- Synplify Premier
- Xilinx Vivado
- hardware emulation platforms
- performance-sensitive validation methodologies

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Verification-Engineer--Emulation-and-Prototyping_JR2021189?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)