# Soc Engineer (Physical Design)

**Company**: Synopsys
**Location**: Ho Chi Minh City
**Work arrangement**: onsite
**Experience**: senior
**Job type**: employee
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/ho-chi-minh-city/soc-engineer-physical-design/44408/98079657792?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_5bdae591-987

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You are a seasoned SOC Engineering professional with a passion for innovation and problem-solving. With a strong background in Electronics Engineering, Electromechanics, or Telecommunications, you bring hands-on experience in Place & Route domains using advanced tools like Fusion Compiler/ICC2.

You will be developing and implementing SOC design using Synopsys EDA tools and IP, covering all stages from spec to post-silicon bring-up. You will contribute to both turnkey projects and serve as a trusted advisor to customer design and CAD teams. You will innovate solutions to problems independently, with occasional guidance. You will set task-level goals and consistently meet schedules. You will collaborate with other Synopsys teams, including BU AE and Sales, to broaden and deploy tool and IP solutions. You will provide technical guidance and mentorship to junior team members.

The Impact You Will Have:

- Enhancing the efficiency and effectiveness of SOC design processes.

- Driving innovation in chip design and verification methodologies.

- Ensuring the successful deployment of Synopsys' EDA tools and IP solutions.

- Improving customer satisfaction through expert advisory and technical support.

- Contributing to the development of high-performance silicon chips and software content.

- Supporting the continuous technological advancements at Synopsys.

Requirements:

- BS/MS/PhD in Electronics Engineering, Electromechanics, or Telecommunications.

- 1 to 4+ years of hands-on experience in Place & Route domains using Fusion Compiler/ICC2 tool.

- Strong debugging skills and a good understanding of P&R, extraction, timing, IREM, and Physical Verification fundamentals.

- Experience with signoff tools like PT, Redhawk, StarRC, ICV is an advantage.

- Proficiency in TCL/PERL/Python scripting.

Rewards and Benefits:

- We offer a comprehensive range of health, wellness, and financial benefits.

- Your recruiter will share details about salary and benefits during the hiring process.

## Skills

### Required
- Fusion Compiler/ICC2
- Place & Route
- P&R
- extraction
- timing
- IREM
- Physical Verification
- TCL
- PERL
- Python

### Nice to have
- PT
- Redhawk
- StarRC
- ICV

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/ho-chi-minh-city/soc-engineer-physical-design/44408/98079657792?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)