# Senior FPGA Prototyping Engineer

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for Level 6
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-FPGA-Prototyping-Engineer---Hardware_JR2028225?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_597b268f-997

## Description

We are seeking a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA. You will craft FPGA prototypes of our next-generation GPUs and SOCs on standard FPGA prototyping platforms.

**Responsibilities:**

- Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design, and taking it through synthesis and place and route.

- Improve performance of the prototype, analyze timing, and generate bit streams.

- Bring up the design on FPGA prototyping platforms and indulge in problem-solving.

- Release the prototype to customers and support them when they face problems.

- Understand the design and implementation, define configurations, develop/modify bringup and testing infrastructure, and verify the correctness of the design.

- Coordinate with architects, designers, verification engineers, and software teams to accomplish tasks.

**Requirements:**

- BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 12+ years of experience, or MS with 10+ years of proven experience in FPGA prototyping.

- Good understanding of FPGA prototyping architecture, devices, flows, and tools.

- Experience in backend flows of FPGA Prototyping - Synthesis, P&R, and Timing closure, with emphasis on Synopsys Protocompiler or Siemens VPS and Xilinx Vivado.

- Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).

- Knowledge of Verilog, System Verilog, and digital design concepts.

- Good debugging and problem-solving skills.

- Hands-on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers).

**Nice to Have:**

- Scripting knowledge (Perl/shell/Tcl).

- Good documentation, communication, and interpersonal skills.

- Experience with memory bring-up of Memory (LPDDR5/6, DDR5/6), CXL/PCIE, and/or high-speed I/F such as USB4/3.

- Prior experience with hardware emulation or prototyping (Synopsys HAPS or Siemens ProFPGA) of a high-performance processor or SOC.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for Level 6. You will also be eligible for equity and benefits.

## Skills

### Required
- FPGA prototyping
- RTL
- Synthesis
- Place and Route
- Timing closure
- Verilog
- System Verilog
- digital design concepts
- ASIC design
- verification tools

### Nice to have
- Scripting knowledge (Perl/shell/Tcl)
- Memory bring-up
- CXL/PCIE
- high-speed I/F
- Hardware emulation
- prototyping

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-FPGA-Prototyping-Engineer---Hardware_JR2028225?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)