# UVM Verification Engineer, Principal Engineer **Company**: Synopsys **Location**: Nepean **Work arrangement**: onsite **Experience**: senior **Job type**: full-time **Salary**: $146,000-$219,000 **Category**: Engineering **Industry**: Technology **Ticker**: SNPS **Wikidata**: https://www.wikidata.org/wiki/Q2303478 **Apply**: https://careers.synopsys.com/job/nepean/uvm-verification-engineer-principal-engineer/44408/91168885696?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply **Canonical**: https://yubhub.co/jobs/job_5236f612-7e3 ## Description Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. As a UVM Verification Engineer, Principal Engineer, you will be part of the Synopsys IP Group, a highly collaborative and innovative team focused on developing leading-edge interface IP solutions for memory technologies. Key Responsibilities: - Develop detailed verification testplans and comprehensive functional coverage models for complex memory interface IP. - Implement scalable UVM testbench infrastructure and designing robust test cases to verify training firmware functionality on RTL PHY models. - Collaborate with architecture and implementation teams through technical reviews, ensuring alignment and clarity across project phases. - Diagnose and resolve complex, abstract verification and debugging challenges using advanced tools and methodologies. - Interpret standard and functional specifications to develop success path, corner case, and negative test scenarios that ensure product robustness. - Research and integrate emerging technologies in virtual prototyping and emulation to enhance verification efficiency and quality. - Mentor junior engineers, contributing to team knowledge sharing and leadership development. Impact: - Elevate the quality and reliability of Synopsys memory interface IP, directly impacting the success and reputation of our products in the global market. - Accelerate the delivery of next-generation silicon solutions by enhancing verification methodologies and reducing time-to-market. - Drive innovation through the adoption of advanced verification technologies and best practices. - Foster a culture of continuous improvement by mentoring team members and sharing technical insights. - Ensure customer satisfaction by delivering IP solutions that meet rigorous industry standards and performance benchmarks. - Support the expansion of Synopsys into new product areas and generations, strengthening our leadership in semiconductor IP. Requirements: - Proficiency in SystemVerilog and UVM, with hands-on experience using simulation and waveform debugging tools. - Strong background in developing verification solutions focused on productivity, performance, and throughput. - Expertise in assertion-based verification and coverage analysis techniques. - Bachelor’s degree or higher in Electrical or Computer Engineering, Computer Science, or a related field. - Experience with scripting languages for regression and build systems (e.g., Python, Perl, Shell). - Familiarity with Linux development environments and collaborative engineering workflows. - Knowledge of virtual prototyping, emulation, and C/C++ software/hardware co-simulation is a strong asset. - Understanding of LPDDR or other memory interface standards is highly desirable. Who You Are: - Analytical thinker with strong attention to detail and a passion for solving challenging problems. - Excellent communicator who can clearly articulate ideas and technical concepts to diverse audiences. - Collaborative team player who thrives in multicultural and multi-disciplinary environments. - Proactive, self-driven, and able to work independently while contributing to team goals. - Mentor and leader who supports the professional growth of colleagues and fosters a positive team culture. - Adaptable, open to feedback, and committed to continuous learning and improvement. Rewards and Benefits: - Comprehensive medical and healthcare plans that work for you and your family. - In addition to company holidays, we have ETO and FTO Programs. - Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. - Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. - Save for your future with our retirement plans that vary by region and country. - Competitive salaries. ## Skills ### Required - SystemVerilog - UVM - Simulation - Waveform Debugging - Assertion-Based Verification - Coverage Analysis - Linux Development Environments - Collaborative Engineering Workflows - Virtual Prototyping - Emulation - C/C++ Software/Hardware Co-Simulation --- Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/nepean/uvm-verification-engineer-principal-engineer/44408/91168885696?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)