# Staff/ Sr Staff DFT Solutions Engineer **Company**: Synopsys **Location**: Noida, Uttar Pradesh **Work arrangement**: onsite **Experience**: senior **Job type**: full-time **Category**: Engineering **Industry**: Technology **Ticker**: SNPS **Wikidata**: https://www.wikidata.org/wiki/Q2303478 **Apply**: https://careers.synopsys.com/job/noida/staff-sr-staff-dft-solutions-engineer/44408/101071131408?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply **Canonical**: https://yubhub.co/jobs/job_51cf79c3-9c0 ## Description You are a seasoned DFT Solutions Engineer with expertise in digital IC design, DFT planning, and test solutions. You will deliver end-to-end DFT solutions for customer designs, from architecture planning and scan insertion through pattern generation, silicon bring-up, and diagnostics analysis. Responsibilities: - Implement and validate test solutions including scan, MBIST, and IEEE 1687 architectures for complex SoCs with multiple IP blocks - Participate in customer design reviews to understand their flows, identify gaps, and propose specific improvements that reduce test time or increase coverage - Prototype and validate new DFT methodologies in collaboration with Solution Architects, proving out viability before customer deployment - Provide technical support and training to customers, including hands-on problem resolution, methodology workshops, and account-level engagement - Conduct product demonstrations, competitive benchmarking, and evaluations to help win new customers and expand adoption of Synopsys test solutions - Analyze silicon test data, diagnose failures, and present findings to both internal teams and customer stakeholders with clear recommendations The Impact You Will Have: - Enable first-time silicon success for customers by delivering robust, validated DFT solutions that catch issues before tapeout - Accelerate time-to-market for automotive and consumer electronics customers by optimizing their test flows and reducing pattern generation cycles - Expand Synopsys' footprint in next-generation test technologies by proving out new methodologies that become standard practice across accounts - Build long-term customer relationships that turn one-time engagements into strategic partnerships, increasing account value and retention - Raise the technical capability of customer teams through training and knowledge transfer, creating a multiplier effect beyond individual projects - Shape the direction of Synopsys test products by feeding real-world customer challenges and use cases back to R&D teams - Contribute to measurable improvements in test coverage, pattern count reduction, and silicon yield across diverse customer programs Requirements: - Bachelor's degree with 7+ years or Master's degree with 5+ years in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field - Hands-on experience with RTL coding, DFT insertion, ATPG pattern generation, and silicon bring-up for digital ICs - Deep knowledge of scan architectures, fault models, test access networks, and IEEE standards including 1149.1, 1500, and 1687 - Proven ability to handle scan implementation and validation for large, multi-IP SoCs with complex hierarchies and multiple clock domains - Experience with MBIST concepts, architecture planning, and integration in automotive or safety-critical design environments is a strong plus - Familiarity with industry-standard DFT tools and flows, exposure to Synopsys TetraMAX, DFT Compiler, or MBIST Architect is valuable - Strong written and verbal communication skills to translate technical concepts for both engineering teams and non-technical stakeholders Benefits: - Comprehensive medical and healthcare plans that work for you and your family - In addition to company holidays, we have ETO and FTO Programs - Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more - Purchase Synopsys common stock at a 15% discount, with a 24-month look-back - Save for your future with our retirement plans that vary by region and country - Competitive salaries ## Skills ### Required - DFT - digital IC design - scan architectures - fault models - test access networks - IEEE standards - RTL coding - ATPG pattern generation - silicon bring-up ### Nice to have - MBIST - automotive design - safety-critical design - Synopsys TetraMAX - DFT Compiler - MBIST Architect --- Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/noida/staff-sr-staff-dft-solutions-engineer/44408/101071131408?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)