# SRAM Design Engineer, Sr Staff

**Company**: Synopsys
**Location**: Hsinchu, Taiwan
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/hsinchu/sram-design-engineer-sr-staff/44408/99385622800?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_4cfffc6c-f1d

## Description

You are an experienced engineer passionate about advancing memory design technologies. You will be designing and verifying SRAM integrated circuits to ensure robustness and reliability. Your responsibilities will include:

- Designing and verifying SRAM integrated circuits to ensure robustness and reliability

- Developing SRAM compilers, including gds and netlist tiling for optimal performance and scalability

- Characterizing SRAM timing, power, and other critical metrics to meet customer and product requirements

- Executing compiler quality assurance processes to uphold industry-leading standards

- Conducting SRAM bitcell analysis and formulating design criteria for advanced memory products

- Utilizing EDA tools (XA, hspice, Verilog, Starrc, EMIR) for simulation, verification, and design optimization

- Collaborating with cross-functional teams to address post-silicon debug and implement improvements

- Exploring and integrating SP/2P/ROM variety designs into SRAM IP solutions

The Impact You Will Have:

- Drive innovation in SRAM IP design, maintaining Synopsys’s leadership in memory technology

- Enhance product performance and reliability for global semiconductor customers

- Support the delivery of best-in-class SRAM compilers used in high-performance silicon chips

- Strengthen quality assurance processes, ensuring robust and scalable designs

- Accelerate time-to-market for new memory IP solutions through efficient verification and debug activities

- Contribute to the development of advanced memory architectures, impacting next-generation electronic devices

You will need:

- Master’s degree in Electrical/Electronic Engineering or a related field

- 12+ years of hands-on experience in SRAM circuit design

- Prior understanding of CMOS-based block level circuit design and SRAM architectures

- Experience with SP/2P/ROM variety design and SRAM bitcell analysis

- Proficiency in digital circuit design and VLSI process concepts

- Familiarity with scripting languages such as Python, Tcl/Tk, Perl, and Unix shell

- Experience with EDA tools for simulation and design: XA, hspice, Verilog, Starrc, EMIR

- Post-silicon debug experience is a plus

Benefits:

- Comprehensive medical and healthcare plans

- Time away programs including ETO and FTO

- Family support including maternity and paternity leave

- ESPP: purchase Synopsys common stock at a 15% discount

- Retirement plans varying by region and country

- Competitive salaries

## Skills

### Required
- SRAM circuit design
- CMOS-based block level circuit design
- VLSI process concepts
- Python
- Tcl/Tk
- Perl
- Unix shell
- XA
- hspice
- Verilog
- Starrc
- EMIR

### Nice to have
- post-silicon debug experience

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/hsinchu/sram-design-engineer-sr-staff/44408/99385622800?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)