# Principal Engineer, DDR/LPDDR/PHY Systems

**Company**: Synopsys
**Location**: Nepean
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: $146,000-$219,000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/nepean/principal-engineer-ddr-lpddr-phy-systems-15193/44408/96009476720?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_4348572e-c30

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We are seeking a Principal Engineer to lead verification and validation efforts for advanced DDR, LPDDR, and HBM memory interface PHY and controller solutions. The successful candidate will develop and optimize embedded firmware to support PHY initialization, training, debug, and system performance. Additionally, they will create and enhance verification environments using UVM, System Verilog, and system-level modeling tools.

The ideal candidate will have 15+ years of experience in verification, firmware, ASIC or SoC development, system validation, or related technical leadership roles. They should have deep knowledge of DDR, LPDDR, HBM, MRDIMM, DFI, or related memory interface protocols, as well as strong experience with UVM-based verification environments and System Verilog.

As a Principal Engineer, you will collaborate with analog, digital, firmware, and hardware teams to debug issues and ensure overall system integrity. You will also bridge pre-silicon and post-silicon activities to improve bring-up efficiency, debug effectiveness, and customer outcomes.

Key responsibilities include:

- Leading verification and validation efforts for advanced DDR, LPDDR, and HBM memory interface PHY and controller solutions

- Developing and optimizing embedded firmware to support PHY initialization, training, debug, and system performance

- Creating and enhancing verification environments using UVM, System Verilog, and system-level modeling tools

- Collaborating with analog, digital, firmware, and hardware teams to debug issues and ensure overall system integrity

- Bridging pre-silicon and post-silicon activities to improve bring-up efficiency, debug effectiveness, and customer outcomes

This is a challenging and rewarding role that requires strong technical expertise, excellent communication skills, and the ability to work collaboratively in a fast-paced environment.

If you are a motivated and experienced engineer looking for a new challenge, please submit your application.

## Skills

### Required
- Verification
- Firmware
- ASIC
- SoC
- System Validation
- UVM
- System Verilog
- DDR
- LPDDR
- HBM
- MRDIMM
- DFI

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/nepean/principal-engineer-ddr-lpddr-phy-systems-15193/44408/96009476720?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)