# Principal SerDes Systems Engineer

**Company**: Synopsys
**Location**: Boxborough, Massachusetts
**Experience**: senior
**Job type**: full-time
**Salary**: $165000-$247000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/boxborough/principal-serdes-systems-engineer-18231/44408/98232395056?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_421c9611-e30

## Description

You are an accomplished engineer with deep expertise in analog, digital, and communications theory, passionate about high-speed serial-link transceiver development. With an M.Sc. or Ph.D. in Electrical or Computer Engineering, you thrive in multidisciplinary environments, collaborating with analog, digital, and hardware engineers to push the boundaries of silicon IP.

**Responsibilities:**

- Developing and maintaining SerDes system models for PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.

- Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.

- Designing and proposing advanced algorithms to calibrate and adapt transceivers for optimal performance.

- Correlating simulated performance with silicon measurements to ensure accuracy and reliability.

- Providing expert assistance to customers for system-level performance issues and troubleshooting.

- Collaborating with cross-functional teams of analog, digital, and hardware engineers throughout all stages of development and post-silicon.

- Contributing to lab testing and analysis for high-speed serial links, ensuring robust design validation.

**Requirements:**

- M.Sc. or Ph.D. in Electrical or Computer Engineering with 6 to 8+ years of relevant experience.

- Strong experience modeling circuits and systems in MATLAB/Simulink.

- Solid understanding of DSP and communications theory, including equalization, encoding, and noise/crosstalk filtering.

- Proficiency in analyzing link budgets for PAM4 high-speed serial links.

- Experience with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).

- Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.

- Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/system Verilog. Programming in Python is a plus.

**Benefits:**

- Comprehensive medical and healthcare plans that work for you and your family.

- In addition to company holidays, we have ETO and FTO Programs.

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

- Save for your future with our retirement plans that vary by region and country.

- Competitive salaries.

## Skills

### Required
- MATLAB/Simulink
- DSP
- communications theory
- equalization
- encoding
- noise/crosstalk filtering
- PAM4 high-speed serial links
- wireline protocols
- optical protocols
- C/Verilog-A/system Verilog
- Python

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/boxborough/principal-serdes-systems-engineer-18231/44408/98232395056?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)