# ASIC Digital Design, Sr Staff Engineer

**Company**: Synopsys
**Location**: Yerevan
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/yerevan/asic-digital-design-sr-staff-engineer/44408/100721402192?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_40e2fb67-736

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You bring extensive ASIC digital design experience with a track record of delivering production RTL for complex semiconductor IP. Your expertise encompasses timing closure, power optimization, and design quality across advanced process nodes.

You will:

- Design RTL modules for UCIe Controller IP from microarchitecture through synthesis-ready implementation

- Optimize designs to meet timing, power, and area targets across multiple process nodes

- Develop Python/tcl/perl automation for design generation and flow integration

- Collaborate with cross-functional teams to resolve timing and power challenges

- Contribute to design reviews and methodology development

Your designs will enable UCIe IP deployed in high-volume HPC, automotive, and AI products. You will contribute to a solid revenue-generating product line for Synopsys. Your work will define performance characteristics for customer systems-on-chip. Your automation will improve design efficiency across the engineering team. Your expertise will influence architectural decisions for future products.

Requirements:

- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field

- 8+ years of ASIC digital design experience with RTL ownership in production silicon

- Expert Verilog proficiency for timing-critical designs

- Strong Python/Tcl/Perl scripting skills for design automation

- Deep knowledge of synthesis, timing analysis, and power optimization

- Experience with Controller IP or high-speed interfaces is preferred

Benefits:

- Comprehensive medical and healthcare plans that work for you and your family

- In addition to company holidays, we have ETO and FTO Programs

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more

- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back

- Save for your future with our retirement plans that vary by region and country

- Competitive salaries

## Skills

### Required
- ASIC digital design
- RTL ownership
- Verilog
- Python
- Tcl
- Perl
- synthesis
- timing analysis
- power optimization

### Nice to have
- Controller IP
- high-speed interfaces

---

Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/yerevan/asic-digital-design-sr-staff-engineer/44408/100721402192?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)