# R&D Engineering, Architect-17332

**Company**: Synopsys
**Location**: Sunnyvale
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: $208,000-$312,000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/sunnyvale/r-and-d-engineering-architect-17332/44408/96016010560?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_3ca4e302-c05

## Description

You are a highly motivated Engineer with over 15+ years of hands-on experience in synthesis, place and route (P&R) and sign-off. You have a robust understanding of the most advanced Interface IP Protocol designs and are eager to work closely with R&D on driving product improvement and developing advanced CAD reference flow. Your technical expertise allows you to demonstrate differentiated PPA results on Synopsys IP portfolio. You thrive in dynamic environments and possess excellent communication skills.

Collaborating with R&D teams to develop leading edge CAD flows for Synopsys IP. Demonstrating differentiated PPA results on industry standard Synopsys Interface IP protocol designs. Providing technical support to IP developers, Key customers and test-chip tapeouts in leading edge nodes. Deliver scalable CAD flows for multiple Synopsys IP to ensure the highest quality and performance of designs. Utilizing scripting languages such as Perl and Tcl for automation and optimization tasks. Staying updated with the latest advancements in ASIC design flow, VLSI, and CAD development to continually improve processes.

This role requires 15+ years of proven experience in ASIC physical Design or CAD flows with expertise in complex SoC at advanced process nodes. You should have deep knowledge of the entire ASIC physical design flow, including floor planning, synthesis, place and route, timing closure, IR-drop/EM analysis, LVS/DRC, and related methodologies. Demonstrated experience developing cutting edge flows and managing cross-functional projects in high-pressure environments is also necessary.

As a successful candidate, you will deliver cutting-edge CAD flows that is scalable and easily adoptable by designers. You will accelerate project timelines and reduce time-to-market for key IP solutions through expert technical leadership. You will enhance CAD flows delivering robust, scalable, and innovative silicon solutions in a fast-evolving industry. You will also enhance the performance and efficiency of Synopsys IP design implementation flows, provide critical support that helps key customers overcome their PPA challenges, and contribute to the development of new features that keep Synopsys solution at the forefront of the industry.

## Skills

### Required
- synthesis
- place and route
- sign-off
- Interface IP Protocol designs
- Perl
- Tcl
- ASIC design flow
- VLSI
- CAD development

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/sunnyvale/r-and-d-engineering-architect-17332/44408/96016010560?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)