# ASIC Digital Design, Staff Engineer

**Company**: Synopsys
**Location**: Boxborough, Massachusetts
**Experience**: staff
**Job type**: employee
**Salary**: $114000-$170000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/boxborough/asic-digital-design-staff-engineer-18138/44408/97629676896?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_3c1dd546-aaa

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You bring extensive ASIC digital design experience with a track record of delivering production RTL for complex semiconductor IP. Your expertise encompasses timing closure, power optimization, and design quality across advanced process nodes.

You will:

- Design RTL modules for LPDDR PHY IP from microarchitecture through synthesis-ready implementation

- Optimize designs to meet timing, power, and area targets across multiple process nodes

- Develop automation for design generation and flow integration

- Collaborate with cross-functional teams to resolve timing and power challenges

- Contribute to design reviews and methodology development

Your designs will enable LPDDR PHY IP deployed in high-volume mobile, automotive, and AI products. You will contribute to a major revenue-generating product line for Synopsys. Your work will define performance characteristics for customer systems-on-chip. Your automation will improve design efficiency across the engineering team. Your expertise will influence architectural decisions for future products.

Requirements:

- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field

- 5+ years of ASIC digital design experience with RTL ownership in production silicon

- Expert Verilog proficiency for timing-critical designs

- Strong Perl scripting skills for design automation

- Deep knowledge of synthesis, timing analysis, and power optimization

- Experience with PHY IP or high-speed interfaces is preferred

Benefits include comprehensive health, wellness, and financial benefits, such as medical and healthcare plans, time away, family support, ESPP, retirement plans, and competitive salaries.

## Skills

### Required
- ASIC digital design
- RTL design
- Verilog
- Perl scripting
- synthesis
- timing analysis
- power optimization

### Nice to have
- PHY IP
- high-speed interfaces

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/boxborough/asic-digital-design-staff-engineer-18138/44408/97629676896?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)