# ASIC Physical Design, Principal Engineer

**Company**: Synopsys
**Location**: Tan Binh district, Ho Chi Minh City
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/ho-chi-minh-city/asic-physical-design-principal-engineer-in-tan-binh-district/44408/91117302576
**Canonical**: https://yubhub.co/jobs/job_3bb7e3ce-9f9

## Description

We are seeking a highly motivated individual with a passion for physical design and implementation of complex Mixed Signal IPs and test chips. As an ASIC Physical Design, Principal Engineer, you will lead the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off.

## What you'll do

- Leading the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off.

- Collaborating with cross-functional teams to integrate and verify IP designs to achieve project goals.

- Providing technical guidance and mentorship.

- Continuously improving design methodologies and processes to enhance efficiency and quality.

## What you need

- BE or MSEE with 10+ years of direct physical design experience.

- Proficiency in full design cycle from RTL to GDSII, with a focus on Physical Design.

- Solid engineering understanding of IC design, implementation flows, and methodologies for deep submicron design.

## Skills

### Required
- Physical Design
- Mixed Signal IPs
- Test Chips

### Nice to have
- RTL to GDS
- Timing and Physical Sign-off
- Cross-functional Team Collaboration