# ASIC Digital Design, Sr Staff Engineer **Company**: Synopsys **Location**: Noida, Uttar Pradesh **Work arrangement**: onsite **Experience**: senior **Job type**: full-time **Category**: Engineering **Industry**: Technology **Ticker**: SNPS **Wikidata**: https://www.wikidata.org/wiki/Q2303478 **Apply**: https://careers.synopsys.com/job/noida/asic-digital-design-sr-staff-engineer/44408/101910955696?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply **Canonical**: https://yubhub.co/jobs/job_38152456-4ad ## Description Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. You are an enthusiastic engineer who thrives at the intersection of various interface IPs. Your analytical mindset and collaborative spirit drive you to solve complex technical challenges that shape the future of connectivity. You are passionate about deepening your expertise and excited by the opportunity to work on advanced DDR/HBM/PCIe/UCIe/Ethernet/UALink IP integration deployed in the most innovative SoCs. ### What You'll Be Doing: - Technically leading and driving ownership of critical areas of verification alongside a team of talented verification engineers. - Defining, implementing, and tracking comprehensive verification test plans to ensure robust coverage and quality. - Specifying, building, enhancing, and maintaining state-of-the-art Subsystem top-level UVM-based System Verilog testbenches, integrating RTL and behavioral models. - Coding and debugging test cases, including the creation of complex checkers and assertions using System Verilog/UVM. - Extracting and reviewing functional coverage (FC) and code coverage metrics to ensure quality metric goals are met. - Managing regressions and contributing to the continuous improvement of verification strategies and test environments. - Debugging and resolving simulation failures, ensuring root-cause analysis and timely solutions. - Working closely with RTL designers and architects to ensure functional correctness. ### The Impact You Will Have: - Drive quality that powers AI, automotive, cloud, and mobile applications at massive scale. - Advance the state-of-the-art in AI-assisted verification methodologies, influencing future verification flows and processes. - Contribute to the early detection and resolution of critical design issues, reducing time-to-market and silicon re-spins. - Collaborate with a global team of experienced verification engineers, fostering knowledge sharing and professional growth. - Bolster Synopsys' leadership in chip design by ensuring our IP verification methodologies set industry standards. ### What You'll Need: - Bachelor's or Master's degree in electronics/electrical engineering or related field, with 8+ years’ experience in ASIC/FPGA Verification. - Ability to debug and define robust verification strategies; experience mentoring is a plus for senior candidates. - Demonstrated experience in technically leading a team, record of successful collaboration and stakeholder management. - Proven expertise in developing System Verilog/UVM-based test environments for complex ASIC designs. - Advanced skills in developing and implementing rigorous test plans, checkers, assertions, and coding complex tests. - Strong proficiency in extracting and analyzing verification metrics such as functional coverage and code coverage. - Experience with interface protocols and IP design/verification processes; knowledge of DDR/HBM/PCIe/UCIe/Ethernet/UALink is highly desirable. - Hands-on experience in owning end-to-end verification deliverables for IPs, including planning, execution, DV metrics closure, and review/signoff. ### Who You Are: - Analytical and detail-oriented, with strong problem-solving and debugging skills. - Initiative-taking and driven to deliver high-quality results in a fast-paced environment. - Seeking feedback, sharing knowledge, and mentoring others when possible. - Collaborative leader who inspires and mentors team members to achieve their best. - Analytical thinker with strong critical thinking skills and a commitment to quality. - Exceptional communicator, able to bridge technical and non-technical stakeholders. - Self-motivated and proactive, with a passion for continuous learning and professional development. - Adaptable and resilient in the face of complex challenges and changing priorities. ### Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. ## Skills ### Required - ASIC/FPGA Verification - System Verilog/UVM - RTL design - Verification methodologies ### Nice to have - DDR/HBM/PCIe/UCIe/Ethernet/UALink - Mentoring - Team leadership --- Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/noida/asic-digital-design-sr-staff-engineer/44408/101910955696?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)