JobPosting
title: HSIO Validation Lead – Silicon Co-Design
description: NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. The Silicon Co-Design Group leads the boundary between what was designed and what was built, focusing on high-speed interface validation. You will own the full stack of post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs. Your role involves closing the hardest failures, defining validation strategy, and building AI agents for automated debug triage and analysis flows. Key responsibilities include: Owning post-silicon bring-up, characterization, validation, and debug of HSIO interfaces Closing the hardest failures by driving root cause analysis across multiple factors Defining validation strategy and setting test coverage, debug priorities, and stress criteria Building and owning AI agents for automated debug and analysis Ensuring robust interoperability across the full ecosystem Driving alignment across various teams with your analysis and data Translating learnings into methodology and coverage improvements Requirements: BS or MS in Electrical Engineering, Computer Engineering, or Systems Engineering, or equivalent experience 8+ years in silicon validation, HSIO bring-up, or high-speed interface debug Deep protocol expertise in PCIe, NVLink, CXL, C2C, Ethernet, USB, or similar technologies Strong signal integrity fundamentals and hands-on lab experience with various tools Ability to debug across the full stack without losing the thread Statistical proficiency and intuition for problem-solving Preferred qualifications: Recognized depth in PCIe, NVLink, CXL, or advanced SERDES validation Experience building or deploying AI-driven flows for HSIO debug Track record of solving critical HSIO failures under schedule pressure Experience setting technical direction across a validation organization You will also be eligible for equity and benefits.
date posted: 2026-07-28T12:40:36.625Z
valid through: 2026-10-02T14:05:37.447Z
direct apply: false
occupational category: Engineering
industry: Technology
skills: Electrical Engineering
skills: Computer Engineering
skills: Systems Engineering
skills: silicon validation
skills: HSIO bring-up
skills: high-speed interface debug
skills: PCIe
skills: NVLink
skills: CXL
skills: C2C
skills: Ethernet
skills: USB
skills: signal integrity
skills: protocol analyzers
skills: logic analyzers
skills: exercisers
skills: silicon debug tools
skills: AI-driven flows for HSIO debug
skills: SERDES validation
skills: technical direction across a validation organization
hiring organization: NVIDIA
job location: Place
  address: PostalAddress
    address locality: Santa Clara
    address region: CA
    address country: US
employment type: FULL_TIME