# Digital Design Engineer Apprenticeship

**Company**: Synopsys
**Location**: Noida, Uttar Pradesh
**Work arrangement**: onsite
**Experience**: entry
**Job type**: internship
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/noida/digital-design-engineer-apprenticeship/44408/102251697536?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_3402b81d-1bd

## Description

Our internship programs offer real-world projects, hands-on experience, and opportunities to collaborate with passionate teams globally.

As a Digital Design Engineer Apprentice at Synopsys, you will assist in developing and maintaining UVM-based testbenches for functional verification of digital blocks of Serdes PHYs.

Responsibilities:

- Assist in developing and maintaining UVM-based testbenches for functional verification of digital blocks of Serdes PHYs

- Create and execute test cases, sequences, checkers, and assertions to verify RTL functionality and ensure protocol compliance in Serial Links

- Analyze simulation results, debug test failures, and work closely with design engineers to identify and resolve functional issues

- Contribute to coverage-driven verification by developing functional coverage models and tracking verification metrics to improve design quality

Requirements:

- Completed Bachelor's degree in Electronics and Communication Engineering, Electrical or a related field (Mandatory)

- Fresh graduates from the class of 2026 or 2025

- Not currently enrolled / completed any M-Tech programs or postgraduate diplomas

- Not employed in any full-time positions at any company (limited internship experience is acceptable)

- Strong digital electronics fundamentals

- Proficiency in Verilog and SystemVerilog, you have written RTL/Testbenches

- Exposure to functional verification methodologies like UVM, OVM, or VMM is a plus

- Theoretical knowledge of protocols such as PCIe is a plus

Key Program Facts:

- Program Length: 12 months Apprenticeship Program

- Location: Noida, India

- Working Model: In office

- Full-Time/Part-Time: Full-time

- Start Date: November 2026

## Skills

### Required
- Electronics and Communication Engineering
- Electrical Engineering
- Verilog
- SystemVerilog
- UVM
- OVM
- VMM

### Nice to have
- functional verification methodologies
- protocols such as PCIe

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/noida/digital-design-engineer-apprenticeship/44408/102251697536?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)