# Analog Design Senior Manager - SerDes

**Company**: Synopsys
**Location**: Bengaluru, Karnataka
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/bengaluru/analog-design-senior-manager-serdes/44408/102293775152?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_3135c5c0-796

## Description

You will lead a team developing multi-Gbps SerDes IP in advanced FinFET and GAA nodes, powering connectivity in systems that matter.

**Key Responsibilities:**

- Lead a team of analog designers developing multi-Gbps NRZ and PAM4 SerDes IP from standards analysis through silicon bring-up

- Conduct technical design reviews for critical SerDes sub-circuits including equalizers, samplers, voltage and current-mode drivers, serializers, deserializers, VCOs, phase mixers, DLLs, PLLs, bandgap references, ADCs, and DACs

- Translate SerDes standards and system requirements into block-level specifications and circuit architectures that your team can execute against

- Review simulation results, electrical characterization data, and post-silicon debug findings, then recommend design updates or corrective actions

- Build project schedules and action plans that keep complex analog IP development on track across multiple process nodes

- Develop and mentor your team through hiring, technical coaching, design reviews, and career growth conversations

- Work cross-functionally with digital designers, verification engineers, layout teams, and CAD to resolve mixed-signal integration and timing challenges

**Requirements:**

- Bachelor's or Master's in Electronics Engineering or related field

- 14+ years of hands-on analog design experience focused on high-speed SerDes applications

- 1 to 2 years in a management or supervisory role leading analog design teams

- Deep transistor-level circuit design expertise with strong CMOS fundamentals and experience across a wide range of SerDes sub-circuits

- Proven ability to design IP for high-speed connectivity standards such as PCIe and Ethernet

- Solid understanding of mixed-signal design challenges including analog-digital interface timing, ESD circuit techniques and layout, custom digital design for high-speed logic paths, and layout effects like matching, reliability, and proximity

- Experience with design-for-reliability considerations including electromigration, IR drop, and aging effects

**Benefits:**

- Comprehensive medical and healthcare plans

- Time away programs including ETO and FTO

- Family support including maternity and paternity leave, parenting resources, adoption and surrogacy assistance

- ESPP: purchase Synopsys common stock at a 15% discount

- Retirement plans that vary by region and country

- Competitive salaries

## Skills

### Required
- analog design
- SerDes
- circuit design
- CMOS
- mixed-signal design
- high-speed connectivity

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/bengaluru/analog-design-senior-manager-serdes/44408/102293775152?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)